Product Information

NBXDBB017LNHTAG

NBXDBB017LNHTAG electronic component of ON Semiconductor

Datasheet
ON Semiconductor Standard Clock Oscillators 156.25 312.5 MHZ 3.3V CLK
Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete

 More Buying Options & Price Grid(s)

Availability Price Quantity
0 - WHS 1

MOQ : 1
Multiples : 1

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NBXDBB017LNHTAG
ON Semiconductor

1 : USD 15.7747
10 : USD 14.9713
20 : USD 14.3427
100 : USD 13.6441
200 : USD 12.9689
500 : USD 12.48
1000 : USD 12.2937
2000 : USD 11.3508
N/A

Obsolete
0 - WHS 2

MOQ : 100
Multiples : 100

Stock Image

NBXDBB017LNHTAG
ON Semiconductor

100 : USD 13.206
200 : USD 12.9419
400 : USD 12.9419
600 : USD 12.9419
N/A

Obsolete

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Product Type
Package / Case
Frequency
Frequency Stability
Operating Supply Voltage
Termination Style
Minimum Operating Temperature
Maximum Operating Temperature
Length
Width
Height
Series
Packaging
Product
Brand
Factory Pack Quantity :
Cnhts
Hts Code
Mxhts
Subcategory
Taric
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Additional Infomation About Product

NBXDPA012 2.5 V / 3.3 V, 106.25 MHz / 212.5 MHz LVDS Clock Oscillator The NBXDPA012 dual frequency crystal oscillator (XO) is designed to meet todays requirements for 2.5 V and 3.3 V LVDS NBXDPA012 1 6 OE V DD FSEL 2 5 CLK GND 3 4 CLK Figure 2. Pin Connections (Top View) Table 1. PIN DESCRIPTION Pin No. Symbol I/O Description 1 OE LVTTL/LVCMOS Output Enable Pin. When left floating pin defaults to logic HIGH and output is active. Control Input See OE pin description Table 2. 2 FSEL LVTTL/LVCMOS Output Frequency Select Pin. Pin will default to logic HIGH when left open. See Output Control Input Frequency Select pin description Table 3. 3 GND Power Supply Ground 0 V 4 CLK LVDS Output NonInverted Clock Output. Typically loaded with 100 receiver termination resistor across differential pair. 5 CLK LVDS Output Inverted Clock Output. Typically loaded with 100 receiver termination resistor across differential pair. 6 V Power Supply Positive power supply voltage. Voltage should not exceed 2.5 V 5% or 3.3 V 10%. DD Table 2. OUTPUT ENABLE TRISTATE FUNCTION Table 3. OUTPUT FREQUENCY SELECT OE Pin Output Pins FSEL Pin Output Frequency (MHz) Open Active Open 106.25 (pin will float high) HIGH Level Active HIGH Level 106.25 LOW Level High Z LOW Level 212.5 Table 4. ATTRIBUTES Characteristic Value Input Default State Resistor 170 k ESD Protection Human Body Model 2 kV Machine Model 200 V Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test 1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D. Table 5. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Units V Positive Power Supply GND = 0 V 4.6 V DD I LVDS Output Current Continuous 25 mA out Surge 50 T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 55 to +120 C stg T Wave Solder See Figure 6 260 C sol Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

HS Compliance

Tariff Desc

8541.60.00 25 No - Mounted piezo-electric crystals Free

ON Semiconductor may also be referenced as

Aptina / ON Semiconductor
FAIRCHILD
FAIRCHILD (ON SEMICONDUCTOR)
Fairchild Semiconductor
FS8
FSC
ON
ON SEMI
ON Semicon
ON SEMICONDUCTOR
ON SEMICONDUCTOR (FAIRCHILD)
ON Semiconductor / Fairchild
ON4
ON5
onsemi
ON-SEMI
onsemi / Fairchild
OOF
Xsens / Fairchild

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