NBXSBA010LN1TAG

NBXSBA010 3.3 V, 100 MHz LVPECL Clock Oscillator The NBXSBA010, single frequency, crystal oscillator (XO) is designed to meet todays requirements for 3.3V LVPECL clock generation applications. The device uses a high Q fundamental crystal and Phase Lock Loop (PLL) multiplier to provide 100 MHz, ultra low NBXSBA010 1 6 OE V DD NC 2 5 CLK GND 3 4 CLK Figure 2. Pin Connections (Top View) Table 1. PIN DESCRIPTION Pin No. Symbol I/O Description 1 OE LVTTL/LVCMOS Output Enable Pin. When left floating pin defaults to logic HIGH and output is active. Control Input See OE pin description Table 2. 2 NC N/A No Connect. 3 GND Power Supply Ground 0 V 4 CLK LVPECL Output NonInverted Clock Output. Typically loaded with 50 receiver termination resistor to V = V 2 V. TT DD 5 CLK LVPECL Output Inverted Clock Output. Typically loaded with 50 receiver termination resistor to V = V 2 V. TT DD 6 V Power Supply Positive power supply voltage. Voltage should not exceed 3.3 V 10%. DD Table 2. OUTPUT ENABLE TRISTATE FUNCTION OE Pin Output Pins Open Active HIGH Level Active LOW Level High Z Table 3. ATTRIBUTES Characteristic Value Internal Default State Resistor 170 k ESD Protection Human Body Model 2 kV Machine Model 200 V Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test 1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D. Table 4. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Units V Positive Power Supply GND = 0 V 4.6 V DD I LVPECL Output Current Continuous 25 mA out Surge 50 T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 55 to +120 C stg T Wave Solder See Figure 5 260 C sol Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.