DATA SHEET www.onsemi.com Bluetooth 5.2 Radio System-on-Chip (SoC) for Automotive 148 QFNW48 NCV-RSL10 CASE 512AD Introduction A member of the RSL10 product family, NCVRSL10 brings the MARKING DIAGRAM industrys lowest power Bluetooth Low Energy technology to the automotive industry. NCVRSL10 helps enable advanced new functionality including keyless entry using a fob or smartphone, active RSL10 safety and diagnostic alerts, and enhanced infotainment controls while AWLYYWWG maximizing energy efficiency. The Bluetooth 5.2 certified radio SoC supports 2 Mbps data rates, twice the speed possible with previous Bluetooth generations. (QFNW48) Specially designed and qualified for the unique needs of automotive, A = Assembly Location NCVRSL10 features builtin data encryption, wettable flankplated WL = Wafer Lot YY = Year packaging, and a higher operating temperature range. WW = Work Week G = PbFree Package Key Features Automotive Ready AECQ100 Grade 2, ETSI, FCC Qualified ORDERING INFORMATION Operating Temperature Range (40C to +105C) Advanced Wireless Functionality Device Package Shipping Bluetooth 5.2 certified with LE 2Mbit PHY (High Speed), as NCVRSL10 QFNW48 3000 / Tape & well as backwards compatibility and support for earlier Bluetooth 101Q48AVG (PbFree) Reel Low Energy specifications For information on tape and reel specifications, Transmitting Power: 17 dBm to +6 dBm including part orientation and tape sizes, please Rx Sensitivity (Bluetooth Low Energy Mode, 1 Mbps): 94 dBm refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Enhanced Security Builtin AES128 encryption accelerator Industrys Lowest Power Consumption Tx peak (PHY) 0 dBm: 4.3 mA (3.3 V Supply) Rx peak (PHY): 2.7 mA (3.3 V Supply) Deep Sleep, I/O Wakeup (3.3 V Supply): 25 nA Deep Sleep, Active External 32 kHz oscillator (3.3 V Supply): 40 nA Reliable Assembly Wettable flankplated QFNW48, 7x7 mm package HighlyIntegrated SystemonChip (SoC) 384 kB of Flash Memory Flexible DualCore architecture (Arm(R) CortexM3 processor, 32bit DSP) Other Specifications Data Rate: 62.5 to 2000 kpbs Flexible Supply Voltage Range (1.13.3 V) Supports Firmware OverTheAir (FOTA) updates Semiconductor Components Industries, LLC, 2018 1 Publication Order Number: January, 2022 Rev. 2 NCVRSL10/DNCVRSL10 FEATURES Arm CortexM3 Processor: A 32bit core for Standby Mode: Can be used to reduce the average realtime applications, specifically developed to enable power consumption for offduty cycle operation, highperformance lowcost platforms for a broad range ranging typically from a few ms to a few hundreds of of lowpower applications. ms. The typical chip power consumption is 30 A in Standby Mode. LPDSP32: A 32bit Dual Harvard DSP core that efficiently supports custom crypto graphic algorithms MultiProtocol Support: Using the flexibility or other signal processing that require significant provided by LPDSP32, the Arm CortexM3 processor, number crunching. and the RF frontend proprietary protocols and other custom protocols are supported. Radio Frequency FrontEnd: Based on a 2.4 GHz RF Flexible Supply Voltage: RSL10 integrates high transceiver, the RFFE implements the physical layer of the Bluetooth Low Energy technology standard and efficiency power regulators and has a VBAT range of other proprietary or custom protocols. 1.1 to 3.3 V. 2 Protocol Baseband Hardware: Bluetooth 5.2 certified Highly Configurable Interfaces: I C, UART, two SPI and includes support for a 2 Mbps RF link and custom interfaces, PCM interface, multiple GPIOs. protocol options. The RSL10 baseband stack is Flexible Clocking Scheme: RSL10 must be clocked supplemented by support structures that enable from the XTAL/PLL of the radio frontend at 48 MHz implementation of onsemi and customer designed when transmitting or receiving RF traffic. When RSL10 custom protocols. is not transmitting/receiving RF traffic, it can run off HighlyIntegrated SoC: The dualcore architecture is the 48 MHz XTAL, the internal RC oscillators, the complemented by highefficiency power management 32 kHz oscillator, or an external clock. A low units, oscillators, flash and RAM memories, a DMA frequency RTC clock at 32 kHz can also be used in controller, along with a full complement of peripherals Deep Sleep Mode. It can be sourced from either the and interfaces. internal XTAL, the RC oscillator, or a digital input pad. Deep Sleep Mode: RSL10 can be put into a Deep Diverse Memory Architecture: 76 kB of SRAM Sleep Mode when no operations are required. Various program memory (4 kB of which is PROM containing Deep Sleep Mode configurations are available, the chip bootup program, and is thus unavailable to including: the user) and 88 kB of SRAM data memory are IO wakeup configuration. The power available. A total of 384 kB of flash is available to store consumption in deep sleep mode is 25 nA (3.3 V the Bluetooth stack and other applications. The Arm VBAT). CortexM3 processor can execute from SRAM and/or Embedded 32 kHz oscillator running with interrupts flash. from timer or external pin. The total current drain is Security: AES128 encryption hardware block for 40 nA (3.3 V VBAT). custom secure algorithms and code protection with As above with 8 kB RAM data retention. The total authenticated debug port access (JTAG lock) current drain is 150 nA (3.3 V VBAT). RoHS Compliant device The DCDC converter can be used in either buck mode or LDO mode during Sleep Mode, depending on VBAT voltage. www.onsemi.com 2