Product Information

74FCT621ATSOG

74FCT621ATSOG electronic component of Renesas

Datasheet
Bus Transceivers OCTAL BUS TRANS OPEN COLL
Manufacturer: Renesas
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 2.373 ea
Line Total: USD 2.37

358 - Global Stock
Ships to you between
Wed. 29 May to Fri. 31 May
MOQ: 1  Multiples: 1
Pack Size: 1

 More Buying Options & Price Grid(s)

Availability Price Quantity
358 - WHS 1


Ships to you between Wed. 29 May to Fri. 31 May

MOQ : 1
Multiples : 1
1 : USD 2.373
10 : USD 2.195
111 : USD 1.934
259 : USD 1.934
518 : USD 1.8509
1036 : USD 1.756
2516 : USD 1.673
5032 : USD 1.6373
10027 : USD 1.5781

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Logic Type
Number of Channels per Chip
Input Level
Output Level
Output Type
High Level Output Current
Low Level Output Current
Propagation Delay Time
Minimum Operating Temperature
Maximum Operating Temperature
Package / Case
Packaging
Series
Supply Current
Brand
Mounting Style
Polarity
Factory Pack Quantity :
Height
Length
Product
Width
Cnhts
Hts Code
Mxhts
Operating Supply Current
Product Type
Subcategory
Taric
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Additional Infomation About Product

IDT74FCT621T/AT FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN) INDUSTRIAL TEMPERATURE RANGE FAST CMOS IDT74FCT621T/AT OCTAL BUS TRANSCEIVER (OPEN DRAIN) FEATURES: DESCRIPTION: Std. and A grades The IDT74FCT621T is an octal transceiver with non-inverting Open- Low input and output leakage 1A (max.) Drain bus compatible outputs in both send and receive directions. The B CMOS power levels bus outputs are capable of sinking 64mA providing very good capacitive True TTL input and output compatibility: drive characteristics. These octal bus transceivers are designed for VOH = 3.3V (typ.) asynchronous two-way communication between data buses. The control VOL = 0.3V (typ.) function implementation allows for maximum flexibility in timing. Meets or exceeds JEDEC standard 18 specifications Power off disable outputs permitlive insertio Available in SOIC package FUNCTIONAL BLOCK DIAGRAM 19 GBA 1 GAB 218 B1 A1 A2-A8 B2-B8 SEVEN OTHER TRANSCEIVERS IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE NOVEMBER 2016 1 2016 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-2538/13IDT74FCT621T/AT FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN) INDUSTRIAL TEMPERATURE RANGE (1) ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION Symbol Description Max Unit (2) VTERM Terminal Voltage with Respect to GND 0.5 to +7 V (3) VTERM Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V 20 VCC GAB 1 TSTG Storage Temperature 65 to +150 C 19 A1 2 GBA IOUT DC Output Current 60 to +120 mA NOTES: A2 18 B1 3 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation A3 4 17 B2 of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating 16 B3 A4 5 conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 6 15 B4 2. Inputs and Vcc terminals only. A5 3. Output and I/O terminals only. 14 B5 A6 7 A7 13 B6 8 CAPACITANCE (TA = +25C, F = 1.0MHz) A8 B7 9 12 (1) Symbol Parameter Conditions Typ. Max. Unit 11 B8 CIN Input Capacitance VIN = 0V 6 10 pF GND 10 COUT Output Capacitance VOUT = 0V 8 12 pF NOTE: 1. This parameter is measured at characterization but not tested. SOIC TOP VIEW PIN DESCRIPTION Pin Names Description GBA, GAB Enable Inputs A1 A8 A Inputs or Open-drain Outputs B1 B8 B Inputs or Open-drain Outputs (1) FUNCTION TABLE Enable Inputs GBA GAB Function L L B data to A bus H H A data to B bus H L OFF L H B data to A bus A data to B bus NOTE: 1. H = HIGH Voltage Level. L = LOW Voltage Level. OFF = HIGH if pull-up resistor is connected to Open-Drain output. 2

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Renesas may also be referenced as

CEL (RENESAS)
ID4
IDT
IDT, Integrated Device Technology Inc
INTEGRATED DEVICE
INTEGRATED DEVICE TECHNOLOGY
INTEGRATED DEVICES TECH AID
Intersil
INTERSIL - FGC
Intersil(Renes as Electronics)
Intersil(Renesas Electronics)
ITS
REA
RENESAS
RENESAS (IDT)
RENESAS (INTERSIL)
Renesas / IDT
Renesas / Intersil
Renesas Electronics
Renesas Electronics America
RENESAS TECHNOLOGY

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