DATASHEET ISL8700A, ISL8701A, ISL8702A, ISL8703A, ISL8704A, FN6381 Rev 1.00 ISL8705A July 24, 2014 The ISL8700A, ISL8701A, ISL8702A, ISL8703A, ISL8704A, Features ISL8705A family of ICs provide four delay adjustable Adjustable Delay to Subsequent Enable Signal sequenced outputs while monitoring an input voltage all with a minimum of external components. Adjustable Delay to Sequence Auto Start High performance DSP, FPGA, P and various subsystems Adjustable Distributed Voltage Monitoring require input power sequencing for proper functionality at Under and Overvoltage Adjustable Delay to Auto Start initial power-up and the ISL870XA provides this function Sequence while monitoring the distributed voltage for over and I/O Options undervoltage compliance. ENABLE (ISL8700A, ISL8702A, ISL8704A) and These ICs operate over the +3.3V to +24V nominal voltage ENABLE (ISL8701A, ISL8703A, ISL8705A) range. All have a user adjustable time from UV and OV SEQ EN (ISL8702A, ISL8703A) and voltage compliance to sequencing start via an external SEQ EN (ISL8704A, ISL8705A) capacitor when in auto start mode and adjustable time delay Voltage Compliance Fault Output to subsequent ENABLE output signal via external resistors. Pb-Free (RoHS Compliant) Additionally, the ISL8702A, ISL8703A, ISL8704A and ISL8705A provide I/O for sequencing on and off operation Applications (SEQ EN) and for voltage window compliance reporting (FAULT) over the +3.3V to +24V nominal voltage range. Power Supply Sequencing Easily daisy chained for more than 4 sequenced signals. System Timing Function Altogether, the ISL870XA provides these adjustable features Pinout with a minimum of external BOM. See Figure 1 for typical ISL870XA implementation. (14 LD SOIC) TOP VIEW Ordering Information PART NUMBER PART TEMP. PACKAGE PKG. ENABLE D 1 14 VIN (Note 1) MARKING RANGE (C) (Pb-free) DWG. ENABLE C 2 13 TD ISL8700AIBZ* ISL 8700AIBZ -40 to +85 14 Ld SOIC M14.15 ENABLE B 3 12 TC ISL8701AIBZ* ISL 8701AIBZ -40 to +85 14 Ld SOIC M14.15 ENABLE A 4 TB 11 OV 5 10 TIME ISL8702AIBZ* ISL 8702AIBZ -40 to +85 14 Ld SOIC M14.15 UV SEQ EN (NC on ISL8700A/01A) 6 9 ISL8703AIBZ* ISL 8703AIBZ -40 to +85 14 Ld SOIC M14.15 GND 7 FAULT (NC on ISL8700A/01A) 8 ISL8704AIBZ* ISL 8704AIBZ -40 to +85 14 Ld SOIC M14.15 ISL8701A, ISL8703A, ISL8705A PINS 1-4 ARE ENABLE FUNCTION ISL8705AIBZ* ISL 8705AIBZ -40 to +85 14 Ld SOIC M14.15 ISL8704A, ISL8705A PIN 9 IS SEQ EN FUNCTION ISL870XAEVAL1 Evaluation Platform *Add -T suffix for tape and reel. 3.3-24V NOTES: 1. Intersil Pb-free plus anneal products employ special Pb-free material EN Vo1 DC/DC sets molding compounds/die attach materials and 100% matte tin VIN Ru ENABLE A plate termination finish, which are RoHS compliant and compatible SEQ EN * ENABLE B with both SnPb and Pb-free soldering operations. Intersil Pb-free ENABLE C EN products are MSL classified at Pb-free peak reflow temperatures that UV ENABLE D DC/DC Vo2 meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Rm FAULT * OV EN GND TB TC TD TIME DC/DC Vo3 Rl EN V04 DC/DC * SEQ EN and FAULT are not available on ISL8700A and ISL8701A FIGURE 1. ISL870XA IMPLEMENTATION FN6381 Rev 1.00 Page 1 of 12 July 24, 2014ISL8700A, ISL8701A, ISL8702A, ISL8703A, ISL8704A, ISL8705A Absolute Maximum Ratings Thermal Information V , ENABLE( ), FAULT . 27V, to -0.3V Thermal Resistance (Typical, Note 2) (C/W) IN JA TIME, TB, TC, TD, UV, OV . +6V, to -0.3V 14 Ld SOIC . 110 SEQ EN( ) . V +0.3V, to -0.3V IN Maximum Junction Temperature (Plastic Package) . +125C ENABLE, ENABLE Output Current . 10mA Maximum Storage Temperature Range -65C to +150C Pb-Free Reflow Profile . see TB493 Operating Conditions Temperature Range -40C to +85C Supply Voltage Range (Nominal) 3.3V to 24V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 2. is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. JA Electrical Specifications Nominal V = 3.3V to +24V, T = T = -40C to+85C, Unless Otherwise Specified. IN A J PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT UV AND OV INPUTS UV/OV Rising Threshold V 1.16 1.21 1.28 V UVRvth UV/OV Falling Threshold V 1.06 1.10 1.18 V UVFvth UV/OV Hysteresis V V - V -104 - mV UVhys UVRvth UVFvth UV/OV Input Current I -10 - nA UV TIME, ENABLE/ENABLE OUTPUTS TIME Pin Charging Current I -2.6 - A TIME TIME Pin Threshold V 1.9 2.0 2.25 V TIME VTH Time from V Valid to ENABLE A t SEQ EN = high, C = open - 30 - s IN VINSEQpd TIME t SEQ EN = high, C = 10nF - 7.7 - ms VINSEQpd 10 TIME t SEQ EN = high, C = 500nF - 435 - ms VINSEQpd500 TIME Time from V Invalid to Shutdown t UV or OV to simultaneous shutdown - - 1 s IN shutdown ENABLE Output Resistance R I = 1mA -100 - EN ENABLE ENABLE Output Low Vol I = 1mA -0.1 - V ENABLE ENABLE Pull-down Current I ENABLE = 1V 10 15 - mA pulld Delay to Subsequent ENABLE Turn-on/off t R = 120k 155 195 240 ms del 120 TX t R = 3k 3.5 4.7 6 ms del 3 TX t R = 0 -0.5 - ms del 0 TX SEQUENCE ENABLE AND FAULT I/O V Valid to FAULT Low t 15 30 50 s IN FLTL V Invalid to FAULT High t -0.5 - s IN FLTH FAULT Pull-down Current FAULT = 1V 10 15 - mA SEQ EN Pull-up Voltage V SEQ EN open - 2.4 - V SEQ SEQ EN Low Threshold Voltage Vil -- 0.3 V SEQ EN SEQ EN High Threshold Voltage Vih 1.2 - - V SEQ EN Delay to ENABLE A Deasserted t SEQ EN low to ENABLE A low - 0.2 1 s SEQ EN ENA BIAS IC Supply Current I V = 3.3V - 191 - A VIN 3.3V IN I V = 12V - 246 400 A VIN 12V IN I V = 24V - 286 - A VIN 24V IN V Power On Reset V V low to high - 2.3 2.8 V IN IN POR IN FN6381 Rev 1.00 Page 2 of 12 July 24, 2014