S34ML04G200TFV000

S34ML01G2 S34ML02G2 S34ML04G2 1 Gb, 2 Gb, 4 Gb, 3 V, 4-bit ECC, SLC NAND Flash Memory for Embedded Distinctive Characteristics Density Device Size 1 Gb / 2 Gb / 4 Gb 1 Gb: 1 plane per device or 128 Mbyte 2 Gb: 2 planes per device or 256 Mbyte Architecture 4 Gb: 2 planes per device or 512 Mbyte Input / Output Bus Width: 8 bits / 16 bits Page size: NAND Flash interface 8: Open NAND Flash Interface (ONFI) 1.0 compliant 1 Gb: (2048 + 64) bytes; 64-byte spare area Address, Data, and Commands multiplexed 2 Gb / 4 Gb: (2048 + 128) bytes; 128-byte spare area Supply Voltage 16: 3.3-V device: V = 2.7V ~ 3.6V 1 Gb: (1024 + 32) words; 32-word spare area CC 2 Gb / 4 Gb (1024 + 64) words; 64-word spare area Security Block size: 64 Pages One Time Programmable (OTP) area 8: Serial number (unique ID) (Contact factory for support) 1 Gb: 128 KB+ 4 KB Hardware program/erase disabled during power transition 2 Gb / 4 Gb: 128 KB + 8 KB Additional features 16 2 Gb and 4 Gb parts support Multiplane Program and Erase 1 Gb: 64k + 2k words commands 2 Gb / 4 Gb: 64k + 4k words Supports Copy Back Program Plane size 2 Gb and 4 Gb parts support Multiplane Copy Back Program 8 Supports Read Cache 1 Gb: 1024 blocks per plane or (128 MB + 4 MB 2 Gb: 1024 blocks per plane or (128 MB + 8 MB Electronic signature 4 Gb: 2048 blocks per plane or (256 MB + 16 MB Manufacturer ID: 01h 16 Operating temperature 1 Gb: 1024 blocks per plane or (64M + 2M) words 2 Gb: 1024 Blocks per Plane or (64M + 4M) words Industrial: 40 C to 85 C 4 Gb: 2048 Blocks per Plane or (128M + 8M) words Industrial Plus: 40 C to 105 C Performance Page Read / Program 10 Year Data retention (Typ) Random access: 25 s (Max) (S34ML01G2) For one plane structure (1-Gb density) Block zero is valid and will be valid for at least 1,000 pro- Random access: 30 s (Max) (S34ML02G2, S34ML04G2) gram-erase cycles with ECC Sequential access: 25 ns (Min) Program time / Multiplane Program time: 300 s (Typ) For two plane structures (2-Gb and 4-Gb densities) Blocks zero and one are valid and will be valid for at least Block Erase (S34ML01G2) 1,000 program-erase cycles with ECC Block Erase time: 3 ms (Typ) Package options Block Erase / Multiplane Erase (S34ML02G2, S34ML04G2) Pb-free and low halogen Block Erase time: 3.5 ms (Typ) 48-Pin TSOP 12 20 1.2 mm Reliability 63-Ball BGA 9 11 1 mm 100,000 Program / Erase cycles (Typ) 67-Ball BGA 8 6.5 1 mm (S34ML01G2, S34ML02G2) (with 4-bit ECC per 528 bytes (8) or 264 words (16)) Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-00499 Rev. *Q Revised April 13, 2018S34ML01G2 S34ML02G2 S34ML04G2 Contents 1. General Description..................................................... 4 5.9 Program / Erase Characteristics................................... 38 1.1 Logic Diagram................................................................ 5 6. Timing Diagrams......................................................... 39 1.2 Connection Diagram ...................................................... 6 6.1 Command Latch Cycle.................................................. 39 1.3 Pin Description............................................................... 8 6.2 Address Latch Cycle..................................................... 39 1.4 Block Diagram................................................................ 9 6.3 Data Input Cycle Timing................................................ 40 1.5 Array Organization......................................................... 9 6.4 Data Output Cycle Timing 1.6 Addressing................................................................... 11 (CLE=L, WE#=H, ALE=L, WP#=H)............................... 40 1.7 Mode Selection ............................................................ 14 6.5 Data Output Cycle Timing 2. Bus Operation ............................................................ 15 (EDO Type, CLE=L, WE#=H, ALE=L) .......................... 41 6.6 Page Read Operation ................................................... 41 2.1 Command Input ........................................................... 15 6.7 Page Read Operation 2.2 Address Input............................................................... 15 (Interrupted by CE#) ..................................................... 42 2.3 Data Input .................................................................... 15 6.8 Page Read Operation Timing 2.4 Data Output.................................................................. 15 with CE# Dont Care ..................................................... 42 2.5 Write Protect ................................................................ 15 6.9 Page Program Operation.............................................. 43 2.6 Standby........................................................................ 15 6.10 Page Program Operation Timing 3. Command Set............................................................. 16 with CE# Dont Care ..................................................... 43 3.1 Page Read................................................................... 17 6.11 Page Program Operation 3.2 Page Program.............................................................. 17 with Random Data Input ............................................... 44 3.3 Multiplane Program 6.12 Random Data Output In a Page ................................... 44 S34ML02G2 and S34ML04G2..................................... 18 6.13 Multiplane Page Program Operation 3.4 Page Reprogram.......................................................... 18 S34ML02G2 and S34ML04G2 ..................................... 45 3.5 Block Erase.................................................................. 20 6.14 Block Erase Operation.................................................. 46 3.6 Multiplane Block Erase 6.15 Multiplane Block Erase S34ML02G2 and S34ML04G2..................................... 20 S34ML02G2 and S34ML04G2 ..................................... 46 3.7 Copy Back Program..................................................... 21 6.16 Copy Back Read with Optional Data Readout.............. 47 3.8 Read Status Register................................................... 22 6.17 Copy Back Program Operation 3.9 Read Status Enhanced With Random Data Input............................................... 47 S34ML02G2 and S34ML04G2..................................... 22 6.18 Multiplane Copy Back Program 3.10 Read Status Register Field Definition.......................... 22 S34ML02G2 and S34ML04G2 ..................................... 48 3.11 Reset............................................................................ 23 6.19 Read Status Register Timing........................................ 49 3.12 Read Cache................................................................. 23 6.20 Read Status Enhanced Timing ..................................... 49 3.13 Cache Program............................................................ 24 6.21 Reset Operation Timing................................................ 49 3.14 Multiplane Cache Program 6.22 Read Cache.................................................................. 50 S34ML02G2 and S34ML04G2..................................... 25 6.23 Cache Program............................................................. 52 3.15 Read ID........................................................................ 26 6.24 Multiplane Cache Program 3.16 Read ID2...................................................................... 28 S34ML02G2 and S34ML04G2 ..................................... 53 3.17 Read ONFI Signature .................................................. 28 6.25 Read ID Operation Timing ............................................ 55 3.18 Read Parameter Page ................................................. 29 6.26 Read ID2 Operation Timing .......................................... 55 3.19 Read Unique ID (Contact Factory)............................... 31 6.27 Read ONFI Signature Timing........................................ 56 3.20 One-Time Programmable (OTP) Entry ........................ 32 6.28 Read Parameter Page Timing ...................................... 56 6.29 Read Unique ID Timing (Contact Factory).................... 56 4. Signal Descriptions ................................................... 33 6.30 OTP Entry Timing ......................................................... 57 4.1 Data Protection and Power On / Off Sequence ........... 33 6.31 Power On and Data Protection Timing ......................... 57 4.2 Ready/Busy.................................................................. 33 6.32 WP# Handling............................................................... 57 4.3 Write Protect Operation ............................................... 34 7. Physical Interface ....................................................... 58 5. Electrical Characteristics.......................................... 35 7.1 Physical Diagram.......................................................... 58 5.1 Valid Blocks ................................................................. 35 5.2 Absolute Maximum Ratings ......................................... 35 8. System Interface ......................................................... 61 5.3 Recommended Operating Conditions.......................... 35 9. Error Management ...................................................... 62 5.4 AC Test Conditions...................................................... 35 9.1 System Bad Block Replacement................................... 62 5.5 AC Characteristics ....................................................... 36 9.2 Bad Block Management................................................ 63 5.6 DC Characteristics....................................................... 37 5.7 Pin Capacitance........................................................... 38 10. Ordering Information.................................................. 64 5.8 Thermal Resistance..................................................... 38 Document Number: 002-00499 Rev. *Q Page 2 of 71