74LVC373A OCTAL D-TYPE LATCH HIGH PERFORMANCE 5V TOLERANT INPUTS HIGH SPEED: t = 6.8ns (MAX.) at V = 3V PD CC POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: I = I = 24mA (MIN) at V = 3V OH OL CC SOP TSSOP PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: Table 1: Order Codes t t PLH PHL OPERATING VOLTAGE RANGE: PACKAGE T & R V (OPR) = 1.65V to 3.6V (1.2V Data CC Retention) SOP 74LVC373AMTR TSSOP 74LVC373ATTR PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 373 LATCH-UP PERFORMANCE EXCEEDS outputs will follow the data input precisely or 500mA (JESD 17) inversely. When the LE is taken low, the Q outputs ESD PERFORMANCE: will be latched precisely or inversely at the logic HBM > 2000V (MIL STD 883 method 3015) level of D input data. While the (OE) input is low, MM > 200V the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will DESCRIPTION be in a high impedance state. This device is designed to interface directly High The 74LVC373A is a low voltage CMOS OCTAL Speed CMOS systems with TTL and NMOS D-TYPE LATCH fabricated with sub-micron silicon 2 components. gate and double-layer metal wiring C MOS It has more speed performance at 3.3V than 5V technology. It is ideal for 1.65 to 3.6 V CC AC/ACT family, combined with a lower power operations and low power and low noise consumption. applications. All inputs are equipped with protection circuits These 8 bit D-Type latch are controlled by a latch against static discharge, giving them 2KV ESD enable input (LE) and an output enable input (OE). immunity and transient excess voltage. While the LE inputs is held at a high level, the Q Figure 1: Pin Connection And IEC Logic Symbols Rev. 3 July 2004 1/13 Obsolete Product(s) - Obsolete Product(s)74LVC373A Figure 2: Input And Output Equivalent Circuit Table 2: Pin Description Table 3: Truth Table PIN N SYMBOL NAME AND FUNCTION INPUTS OUTPUT 1OE Asynchronous Master OE LE D Q Reset (Active LOW) H XXZ 2, 5, 6, 9, 12, Q0 to Q7 3-State Outputs NO 15, 16,19 LL X CHANGE 3, 4, 7, 8, 13, D0 to D7 Data Inputs LHL L 14, 17, 18 LH H H 11 LE Latch Enable Input 10 GND Ground (0V) X : Dont Care 20 V Positive Supply Voltage CC Z :High Impedance Table 4: Absolute Maximum Ratings Symbol Parameter Value Unit V Supply Voltage -0.5 to +7.0 V CC V DC Input Voltage -0.5 to +7.0 V I V DC Output Voltage (V = 0V) -0.5 to +7.0 V O CC V DC Output Voltage (High or Low State) (note 1) -0.5 to V + 0.5 V O CC I DC Input Diode Current - 50 mA IK I DC Output Diode Current (note 2) - 50 mA OK I DC Output Current 50 mA O I or I DC V or Ground Current per Supply Pin 100 mA CC GND CC T Storage Temperature -65 to +150 C stg T Lead Temperature (10 sec) 300 C L Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) I absolute maximum rating must be observed O 2) V < GND O 2/13 Obsolete Product(s) - Obsolete Product(s)