HCF4518BEY

HCF4518B DUAL BCD UP COUNTER MEDIUM SPEED OPERATION : 6MHz (Typ.) at 10V POSITIVE -OR NEGATIVE- EDGE TRIGGERING SYNCHRONOUS INTERNAL CARRY PROPAGATION DIP SOP QUIESCENT CURRENT SPECIF. UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT I = 100nA (MAX) AT V = 18V T = 25C ORDER CODES I DD A 100% TESTED FOR QUIESCENT CURRENT PACKAGE TUBE T & R MEETS ALL REQUIREMENTS OF JEDEC DIP HCF4518BEY JESD13BSTANDARD SPECIFICATIONS SOP HCF4518BM1 HCF4518M013TR FOR DESCRIPTION OF B SERIES CMOS DEVICE incrementing on either the positive-going or DESCRIPTION negative going transitions. For single-unit HCF4518B is a monolithic integrated circuit operations the Enable input is maintained High fabricated in Metal Oxide Semiconductor and the counter advances on each positive going technology available in DIP and SOP packages. transition of the Clock. The counters are cleared HCF4518B Dual BCD Up Counter consists of two by high levels on their Reset lines. The counter identical, internal 4 stage counters. The counter can be cascaded in the ripple mode by connecting stages are D-type Flip-Flops having Q4 to the enable input of the subsequent counter while the clock input of the latter is held low. interchangeable Clock and Enable lines for PIN CONNECTION October 2002 1/11 Obsolete Product(s) - Obsolete Product(s) HCF4518B IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1 CLOCK A Clock A input 2 ENABLE A Enable A Input 7 RESET A Reset A Input 3, 4, 5, 6 Q1A to Q4A Data Outputs 9 CLOCK B Clock B input 10 ENABLE B Enable B Input 15 RESET B Reset B Input 11,12,13,14 Q1B to Q4B Data Outputs V 8 Negative Supply Voltage SS V 16 Positive Supply Voltage DD FUNCTIONAL DIAGRAM TRUTH TABLE CLOCK ENABLE RESET ACTION H L INCREMENT COUNTER L L INCREMENT COUNTER X L NO CHANGE X L NO CHANGE L L NO CHANGE H L NO CHANGE X X H Q1 THRU Q4 = 0 X : Dont Care 2/11 Obsolete Product(s) - Obsolete Product(s)