M24C16-DRDW8TPK STMicroelectronics

M24C16-DRE 16-Kbit serial IC bus EEPROM - 105C operation Datasheet - production data Features 2 Compatible with all I C bus modes 1 MHz 400 kHz 100 kHz Memory array TSSOP8 (DW) 16 Kbits (2 Kbytes) of EEPROM 169 mil width Page size: 16 bytes Additional Write lockable page (Identification page) Extended temperature and voltage range -40 C to 105 C 1.7 V to 5.5 V Schmitt trigger inputs for noise filtering Short Write cycle time SO8 (MN) Byte Write within 4 ms 150 mil width Page Write within 4 ms Write cycle endurance 4 million Write cycles at 25 C 1.2 million Write cycles at 85 C 900 k Write cycles at 105 C WFDFPN8 (MF) Data retention 2 x 3 mm more than 50 years at 105 C 200 years at 55 C ESD Protection (Human Body Model) 4000 V Packages RoHS compliant and halogen-free (ECOPACK2 ) January 2017 DocID027242 Rev 2 1/40 This is information on a product in full production. www.st.comContents M24C16-DRE Contents 1 Description . 6 2 Signal description . 8 2.1 Serial Clock (SCL) . 8 2.2 Serial Data (SDA) 8 2.3 Write Control (WC) . 8 2.4 V (ground) . 8 SS 2.5 Supply voltage (V ) . 8 CC 3 Device operation 9 3.1 Start condition 10 3.2 Stop condition 10 3.3 Data input . 10 3.4 Acknowledge bit (ACK) 10 3.5 Device addressing .11 3.6 Identification page 12 4 Instructions . 13 4.1 Write operations 13 4.1.1 Byte Write . 14 4.1.2 Page Write . 15 4.1.3 Write Identification Page 16 4.1.4 Lock Identification Page . 16 4.1.5 Minimizing Write delays by polling on ACK 17 4.2 Read operations 18 4.2.1 Random Address Read . 18 4.2.2 Current Address Read 19 4.2.3 Sequential Read 19 4.2.4 Read Identification Page 19 4.2.5 Read the lock status . 19 4.2.6 Acknowledge in Read mode . 20 5 Application design recommendations . 21 2/40 DocID027242 Rev 2