M24M01-HRMN6TP STMicroelectronics

M24M01-R M24M01-DF 1-Mbit serial IC bus EEPROM Datasheet production data Features 2 Compatible with all I C bus modes: 1 MHz 400 kHz 100 kHz Memory array: SO8 (MN) 1 Mbit (128 Kbytes) of EEPROM 150 mil width Page size: 256 bytes Additional Write lockable page (M24M01-D order codes) Single supply voltage and high speed: 1 MHz clock from 1.7 V to 5.5 V Write: TSSOP8 (DW) Byte Write within 5 ms Page Write within 5 ms Operating temperature range: from -40 C up to +85 C Random and sequential Read modes Write protect of the whole memory array WLCSP (CS) Enhanced ESD/Latch-Up protection More than 4 million Write cycles More than 200-year data retention Packages: RoHS compliant and halogen-free (ECOPACK ) September 2012 Doc ID 12943 Rev 10 1/38 This is information on a product in full production. www.st.com 1Contents M24M01-R M24M01-DF Contents 1 Description . 6 2 Signal description . 8 2.1 Serial Clock (SCL) . 8 2.2 Serial Data (SDA) 8 2.3 Chip Enable (E1, E2) . 8 2.4 Write Control (WC) . 8 2.5 V (ground) . 8 SS 2.6 Supply voltage (V ) . 9 CC 2.6.1 Operating supply voltage V CC 9 2.6.2 Power-up conditions 9 2.6.3 Device reset . 9 2.6.4 Power-down conditions 9 3 Memory organization . 10 4 Device operation . 11 4.1 Start condition . 12 4.2 Stop condition . 12 4.3 Data input . 12 4.4 Acknowledge bit (ACK) . 12 4.5 Device addressing 13 5 Instructions . 14 5.1 Write operations 14 5.1.1 Byte Write . 15 5.1.2 Page Write . 16 5.1.3 Write Identification Page (M24M01-D only) 17 5.1.4 Lock Identification Page (M24M01-D only) 17 5.1.5 ECC (Error Correction Code) and Write cycling 18 5.1.6 Minimizing Write delays by polling on ACK 19 5.2 Read operations 20 5.2.1 Random Address Read . 21 2/38 Doc ID 12943 Rev 10