M74HC374 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING HIGH SPEED: f = 90MHz (TYP.) at V = 6V MAX CC LOW POWER DISSIPATION: I = 4A(MAX.) at T =25C CC A HIGH NOISE IMMUNITY: V = V = 28 % V (MIN.) NIH NIL CC DIP SOP TSSOP SYMMETRICAL OUTPUT IMPEDANCE: I = I = 6mA (MIN) OH OL BALANCED PROPAGATION DELAYS: t t PLH PHL ORDER CODES WIDE OPERATING VOLTAGE RANGE: PACKAGE TUBE T & R V (OPR) = 2V to 6V CC DIP M74HC374B1R PIN AND FUNCTION COMPATIBLE WITH SOP M74HC374M1R M74HC374RM13TR 74 SERIES 374 TSSOP M74HC374TTR DESCRIPTION The M74HC374 is an high speed CMOS OCTAL level) and while OE is high the outputs will be in D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS a high impedance state. NON INVERTING fabricated with sub-micron The output control does not affect the internal 2 silicon gate C MOS technology. operation of flip-flops that is, the old data can be This 8 bit D-TYPE FLIP FLOP is controlled by a retained or the new data can be entered even clock input (CK) and an output enable input (OE). while the outputs are off. On the positive transition of the clock, the Q All inputs are equipped with protection circuits outputs will be set to the logic state that were against static discharge and transient excess setup at the D inputs. voltage. While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/11 Obsolete Product(s) - Obsolete Product(s)M74HC374 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1OE 3 State Output Enable Input (Active LOW) 2, 5, 6, 9, 12, Q0 to Q7 3 State Outputs 15, 16, 19 3, 4, 7, 8, 13, D0 to D7 Data Inputs 14, 17, 18 11 CK Clock Input (LOW to HIGH, edge triggered) 10 GND Ground (0V) 20 V Positive Supply Voltage CC TRUTH TABLE INPUTS OUTPUT OE CK D Q H XXZ L X NO CHANGE LLL LHH X: Dont Care Z: High Impedance LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/11 Obsolete Product(s) - Obsolete Product(s)