M95M04-DRMN6TP STMicroelectronics

M95M04-DR Datasheet 4-Mbit serial SPI bus EEPROM Features Compatible with the serial peripheral interface (SPI) bus Memory array SO8N (MN) 4 Mbit (512 Kbytes) of EEPROM 150 mil width Page size: 512 bytes Additional write lockable page (identification page) Write time Byte write within 5 ms Page write within 5 ms TSSOP8 (DW) Write protect 169 mil width quarter array half array whole memory array Max clock frequency: 10 MHz for V 2.5 V CC WLCSP (2.809 1.863 mm) 5 MHz for V 1.8 V CC Single supply voltage: 1.8 V to 5.5 V Operating temperature range: from -40 C up to +85 C Enhanced ESD protection (up to 4 kV in human body model) More than 4 million write cycles More than 40-year data retention Product status link Packages M95M04-DR SO8N (ECOPACK2) TSSOP8 (ECOPACK2) WLCSP (ECOPACK2) DS12179 - Rev 2 - February 2021 www.st.com For further information contact your local STMicroelectronics sales office.M95M04-DR Description 1 Description The M95M04-DR device is electrically erasable programmable memory (EEPROM) organized as 524288 x 8 bits, accessed through the SPI bus. The M95M04-DR can operate with a supply range from 1.8 to 5.5 V, and is guaranteed over the -40 C/+85 C temperature range. The M95M04-DR offer an additional page, named the identification page (512 bytes). The identification page can be used to store sensitive application parameters that can be (later) permanently locked in read-only mode. Figure 1. Logic diagram VCC D C S M95xxx Q W HOLD VSS MS45413V1 The SPI bus signals are C, D and Q, as shown in Figure 1 and Table 1. The device is selected when Chip select (S) is driven low. Communications with the device can be interrupted when the HOLD is driven low. Table 1. Signal names Signal name Function Direction C Serial clock Input D Serial data input Input Q Serial data output Output S Chip select Input W Write protect Input HOLD Hold Input V Supply voltage - CC V SS Ground - DS12179 - Rev 2 page 2/44