ST10R167-Q3/TR

ST10R167 16-BIT ROMLESS MCU HIGH PERFORMANCE CPU 16-BIT CPU WITH 4-STAGE PIPELINE 80ns INSTRUCTION CYCLE TIME 25MHz CLK 400ns 16 X 16-BIT MULTIPLICATION 800ns 32 / 16-BIT DIVISION ENHANCED BOOLEAN BIT MANIPULATION FACILITIES ADDITIONAL INSTRUCTIONS TO SUPPORT HLL AND OPERATING SYSTEMS SINGLE-CYCLE CONTEXT SWITCHING SUPPORT PQFP144 (28 x 28 mm) MEMORY ORGANIZATION (Plastic Quad Flat Pack) UP TO 16M BYTE LINEAR ADDRESS SPACE FOR CODE AND DATA (5M BYTE WITH CAN) UP TO 111 GENERAL PURPOSE I/O LINES INDIVIDUALLY PROGRAMMABLE AS INPUT, 2K BYTE ON-CHIP INTERNAL RAM (IRAM) OUTPUT OR SPECIAL FUNCTION 2K BYTE ON-CHIP EXTENSION RAM (XRAM) PROGRAMMABLE DRIVE STRENGTH FAST AND FLEXIBLE BUS PROGRAMMABLE THRESHOLD (HYSTERESIS) PROGRAMMABLE EXTERNAL BUS IDLE AND POWER DOWN MODES CHARACTERISTICS FOR DIFFERENT ADDRESS IDLE CURRENT <95mA RANGES POWER-DOWN SUPPLY CURRENT <400A 8-BIT OR 16-BIT EXTERNAL DATA BUS 4-CHANNEL PWM UNIT MULTIPLEXED OR DEMULTIPLEXED EXTERNAL SERIAL CHANNELS ADDRESS/DATA BUSES SYNCHRONOUS/ASYNC SERIAL CHANNEL FIVE PROGRAMMABLE CHIP-SELECT SIGNALS HIGH-SPEED SYNCHRONOUS CHANNEL HOLD-ACKNOWLEDGE BUS ARBITRATION DEVELOPMENT SUPPORT SUPPORT C-COMPILERS, MACRO-ASSEMBLER PACKAGES, EMULATORS, EVAL BOARDS, HLL-DEBUGGERS, INTERRUPT SIMULATORS, LOGIC ANALYZER DISASSEM- 8-CHANNEL PERIPHERAL EVENT CONTROLLER BLERS, PROGRAMMING BOARDS FOR SINGLE CYCLE, INTERRUPT DRIVEN DATA 144-PIN PQFP PACKAGE TRANSFER 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH 16 56 SOURCES, SAMPLE-RATE DOWN TO 40ns 32 ROM- 16 Internal CPU-Core RAM LESS TIMERS TWO MULTI-FUNCTIONAL GENERAL PURPOSE 16 TIMER UNITS WITH 5 TIMERS PEC Watchdog TWO 16-CHANNEL CAPTURE/COMPARE UNITS 16 XRAM A/D CONVERTER 16-CHANNEL 10-BIT Interrupt Controller 16 OSC. 7.76s CONVERSION TIME CAN FAIL-SAFE PROTECTION PROGRAMMABLE WATCHDOG TIMER OSCILLATOR WATCHDOG 16 ON-CHIP CAN 2.0B INTERFACE 16 16 ON-CHIP BOOTSTRAP LOADER BRG BRG CLOCK GENERATION 8 Port 5 Port 3 Port 7 Port 8 Port 6 ON-CHIP PLL 8 16 15 8 8 DIRECT OR PRESCALED CLOCK INPUT August 1999 1/63 This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice. Port 4 Port 1 Port 0 External Bus Controller 10-Bit ADC GPT1 GPT2 ASC usart SSC PWM CAPCOM2 CAPCOM1 Port 2ST10R167 TABLE OF CONTENTS Page I INTRODUCTION ......................................................................................................... 4 II PIN DATA .................................................................................................................. 5 III FUNCTIONAL DESCRIPTION.................................................................................... 10 IV MEMORY ORGANIZATION........................................................................................ 11 V CENTRAL PROCESSING UNIT (CPU) ...................................................................... 12 VI EXTERNAL BUS CONTROLLER............................................................................... 13 VII INTERRUPT SYSTEM ................................................................................................ 14 VIII CAPTURE/COMPARE (CAPCOM) UNIT ................................................................... 17 IX GENERAL PURPOSE TIMER UNIT........................................................................... 18 IX.1 GPT1 .......................................................................................................................... 18 IX.2 GPT2 .......................................................................................................................... 19 X PWM MODULE ........................................................................................................... 21 XI PARALLEL PORTS .................................................................................................... 22 XII A/D CONVERTER....................................................................................................... 23 XIII SERIAL CHANNELS .................................................................................................. 24 XIV CAN MODULE ............................................................................................................ 26 XV WATCHDOG TIMER................................................................................................... 26 XVI INSTRUCTION SET SUMMARY ................................................................................ 27 XVII SYSTEM RESET......................................................................................................... 29 XVIII POWER REDUCTION MODES .................................................................................. 30 XIX SPECIAL FUNCTION REGISTER OVERVIEW.......................................................... 31 XIX.1 IDENTIFICATION REGISTERS ................................................................................. 37 XX ELECTRICAL CHARACTERISTICS .......................................................................... 38 XX.1 ABSOLUTE MAXIMUM RATINGS ............................................................................. 38 XX.2 PARAMETER INTERPRETATION ............................................................................. 38 XX.3 DC CHARACTERISTICS ........................................................................................... 39 XX.3.1 A/D converter characteristics ...................................................................................... 40 XX.4 AC CHARACTERISTICS ............................................................................................ 41 XX.4.1 Definition of internal timing ......................................................................................... 42 XX.4.2 Clock generation modes ............................................................................................. 42 2/63