ST7SCR1E4, ST7SCR1R4 8-bit low-power, full-speed USB MCU with 16-Kbyte Flash, 768-byte RAM, smartcard interface and timer Datasheet production data Features Memories Up to 16 Kbytes of ROM or High Density Flash SO24 QFN24 LQFP64 14x14 (HDFlash) program memory with read/write protection, HDFlash In-Circuit and In-Application Programming. 100 write/erase cycles ISO7816-3 UART interface guaranteed, data retention: 40 years at 55C 4 MHz clock generation Up to 768 bytes of RAM including up to 128 Synchronous/Asynchronous protocols bytes stack and 256 bytes USB buffer (T=0, T=1) Clock, reset and supply management Automatic retry on parity error Low voltage reset Programmable baud rate from 372 clock pulses up to 11.625 clock pulses (D=32/F=372) 2 power saving modes: Halt and Wait modes Card Insertion/Removal Detection PLL for generating 48 MHz USB clock using a 4 MHz crystal Smartcard power supply Interrupt management Selectable card V 1.8V, 3V, and 5V CC Nested Interrupt controller Internal step-up converter for 5V supplied Smartcards (with a current of up to 55mA) USB (Universal Serial Bus) interface using only two external components. 256-byte buffer for full speed bulk, control and Programmable Smartcard Internal Voltage interrupt transfer types compliant with USB Regulator (1.8V to 3.0V) with current overload specification (version 2.0) protection and 4 KV ESD protection (Human Body Model) for all Smartcard Interface I/Os On-Chip 3.3V USB voltage regulator and transceivers with software power-down One 8-bit timer 7 USB endpoints: Time Base Unit (TBU) for generating periodic One 8-byte Bidirectional Control Endpoint interrupts. One 64-byte In Endpoint, One 64-byte Out Endpoint Development tools Four 8-byte In Endpoints Full hardware/software development package 35 or 4 I/O ports ECOPACK packages Up to 4 LED outputs with software programmable constant current (3 or 7 mA). Table 1. Device summary 2 General purpose I/Os programmable as Reference Part number interrupts Up to 8 line inputs programmable as interrupts ST7SCR1R4 ST7FSCR1T1, ST7SCR1T1 Up to 20 outputs ST7FSCR1M1, ST7SCR1M1, ST7SCR1E4 ST7SCR1U1 1 line assigned by default as static input after reset July 2012 Doc ID 8951 Rev 6 1/121 This is information on a product in full production. www.st.com 1Contents ST7SCR1E4, ST7SCR1R4 Contents 1 Description . 8 2 Pin description 10 3 Register and memory map . 16 4 Flash program memory . 19 4.1 Introduction . 19 4.2 Main features 19 4.3 Structure 19 4.4 ICP (In-circuit programming) 20 4.5 IAP (In-application programming) . 20 4.6 Program memory read-out protection . 21 4.7 Related documentation 21 4.8 Register description . 22 5 Central processing unit . 23 5.1 Introduction . 23 5.2 Main features 23 5.3 CPU registers 23 6 Supply, reset and clock management 27 6.1 Clock system 27 6.1.1 General description 27 6.1.2 External clock 28 6.2 Reset sequence manager (RSM) . 28 6.2.1 Introduction 28 6.2.2 Functional description 28 7 Interrupts . 30 7.1 Introduction . 30 7.2 Masking and processing flow 30 7.3 Interrupts and low power modes . 33 2/121 Doc ID 8951 Rev 6