STA020DJTR

STA020 96 kHz digital audio interface transmitter Datasheet - production data Description The STA020 is a monolithic CMOS device which encodes and transmits audio data according to the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340 interface standards. It supports 96 kHz sample rate operation. SO24 Order code: STA020DJTR The STA020 accepts audio and digital data which is then multiplexed, encoded and driven onto a cable. The audio serial port is double-buffered and Features capable of supporting a wide variety of formats. The STA020 multiplexes the channel, user, and Monolithic digital audio interface transmitter validity data directly from the serial input pins with 3.3 V supply voltage dedicated input pins for the most important Supports: channel status bits. AES/EBU, IEC 958 S/PDIF, & EIAJ CP-340 Professional and consumer formats Parity bits and CRC codes generated Transparent mode allows direct connection of STA020 and STA120 Figure 1. Block diagram M0 M1 M2 VD+ GND MCK RST 23 22 21 5 16 19 18 6 SCK 7 AUDIO FSYNC SERIAL PORT 8 20 SDATA TXP MUX DIFFERENTIAL 17 TXN 10 C 11 REGISTERS U 9 7 V 15 24 D97AU599A DEDICATED CHANNEL CBL TRNPT STATUS BUS September 2014 DocID006832 Rev 7 1/15 This is information on a product in full production. www.st.comOverview STA020 1 Overview Table 1. Absolute maximum ratings Symbol Parameter Value Unit V DC power supply 4 V D+ V Digital input voltage -0.3 to V 0.3 V IND D+ T Ambient operating temperature (power applied) -20 to +85 C amb T Storage temperature -40 to 150 C stg Table 2. Recommended operating conditions (GND = 0 V all voltages with respect to ground) Symbol Parameter Test condition Min. Typ. Max. Unit V DC voltage 3 3.3 3.6 V D+ T Ambient operating temp. 0 25 70 C amb Figure 2. Pin connections (top view) C7/C3 1 24 TRNPT/FC1 PRO 2 23 M0 C1/FC0 3 22 M1 C6/C2 4 21 M2 MCK 5 20 TXP SCK 6 19 VD+ FSYNC 7 18 GND SDATA 8 17 TXN V 9 16 RST C/SBF 10 15 CBL/SBC U 11 14 EM0/C9 C9/C15 12 13 EM1/C8 D97AU608A Table 3. Pin description N Pin Function Power supply connections 18 GND Ground. 19 VD+ Positive digital power. Nominally +3.3 V. Audio input interface Serial clock. Serial clock for SDATA pin which can be configured (via the M0, M1 6 SCK and M2 pins) as an input or output and can sample data on the rising or falling edge. As an output, SCK will contain 32 clocks for every audio sample. 2/15 DocID006832 Rev 7