Product Information

STA369BWSTR

STA369BWSTR electronic component of STMicroelectronics

Datasheet
Audio Amplifiers 2.1ch 40W hi-eff digital audio system

Manufacturer: STMicroelectronics
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

47: USD 2.5806 ea
Line Total: USD 121.29

970 - Global Stock
Ships to you between
Fri. 10 May to Wed. 15 May
MOQ: 47  Multiples: 1
Pack Size: 1
Availability Price Quantity
970 - Global Stock


Ships to you between Fri. 03 May to Thu. 09 May

MOQ : 1000
Multiples : 1000

Stock Image

STA369BWSTR
STMicroelectronics

1000 : USD 2.743

970 - Global Stock


Ships to you between
Fri. 10 May to Wed. 15 May

MOQ : 47
Multiples : 1

Stock Image

STA369BWSTR
STMicroelectronics

47 : USD 2.5806

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Series
Product
Output Power
Mounting Style
Type
Package / Case
THD plus Noise
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Packaging
Supply Current
Brand
Operating Supply Voltage
Factory Pack Quantity :
Cnhts
Hts Code
Mxhts
Operating Supply Current
Product Type
Subcategory
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STA369BWS 2.1-channel 40-watt high-efficiency digital audio system Sound Terminal Datasheet - production data Audio presets: 15 preset crossover filters 5 preset anti-clipping modes Preset night-time listening mode Individual channel soft/hard mute Independent channel volume and DSP bypass 2 I S input data interface PowerSSO-36 Input and output channel mapping with exposed pad down (EPD) Automatic invalid input-detect mute Up to 8 user-programmable biquads/channel Three coefficients banks for EQ presets storing Features 2 with fast recall via I C interface Wide-range supply voltage, 4.5 V to 21.5 V Extended filter dynamics +4/-4 for better sound Three power output configurations: shaping and easier filter implementation 2 channels of ternary PWM Bass/treble tones and de-emphasis control (2 x 20 W into 8 at 18 V) + PWM output Selectable high-pass filter for DC blocking 2 channels of ternary PWM Advanced AM interference frequency (2 x 20 W into 8 at 18 V) + ternary stereo switching and noise suppression modes line-out 2.1 channels of binary PWM (left, right, F3X advanced PWM modulation scheme for LFE) (2 x 9 W into 4 +1 x 20 W into 8 carrier suppression (headphone or line output) at 18 V) Selectable high- or low-bandwidth FFX with 100-dB SNR and dynamic range noise-shaping topologies Scalable FFX modulation index (up to 100%) Selectable clock input ratio Selectable 32- to 192-kHz input sample rates 96-kHz internal processing sample rate with 2 quantization error noise shaping for very low I C control with selectable device address cut-off frequency filters Digital gain/attenuation +48 dB to -80 dB with Thermal overload and short-circuit protection 0.125-dB/step resolution embedded Soft volume update with programmable ratio Video apps: 576 x f input mode supported S Individual channel and master gain/attenuation PCB manufacturing short-circuit protection Two independent DRCs configurable as a technology 2 dual-band anti-clipper (B DRC) or as independent limiters/compressors with Table 1. Device summary optional global DRC capability Order code Package Packaging EQ-DRC for DRC based on filtered signals STA369BWS PowerSSO-36 EPD Tube Dedicated LFE processing for bass boosting with 0.125-dB/step resolution STA369BWSTR PowerSSO-36 EPD Tape and reel September 2014 DocID016861 Rev 7 1/92 This is information on a product in full production. www.st.comContents STA369BWS Contents 1 Description . 9 2 Pin connections 11 2.1 Connection diagram . 11 2.2 Pin description . 11 3 Electrical specifications . 13 3.1 Absolute maximum ratings 13 3.2 Thermal data 13 3.3 Recommended operating conditions 14 3.4 Electrical specifications for the digital section . 14 3.5 Electrical specifications for the power section . 15 3.6 Power on/off sequence . 17 4 Serial audio interface . 18 4.0.1 Timings . 18 4.0.2 Delay serial clock enable 18 4.0.3 Channel input mapping . 18 5 Processing data paths 19 2 6I C bus specification 21 6.1 Communication protocol 21 6.1.1 Data transition or change 21 6.1.2 Start condition 21 6.1.3 Stop condition 21 6.1.4 Data input . 21 6.2 Device addressing 21 6.3 Write operation . 22 6.3.1 Byte write 22 6.3.2 Multi-byte write 22 6.4 Read operation . 22 6.4.1 Current address byte read . 22 2/92 DocID016861 Rev 7

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
C-Max
C-Max (VA)
SG3
ST
ST MICROELECTRONICS
ST2
ST7
STM
STMICRELECTRONICS
STN

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