STEVAL-FKI868V2 STMicroelectronics

STEVAL-FKI868V2 Data brief Sub-1GHz (860-940 MHz) transceiver development kit based on S2-LP Features S2-LP narrow band ultra-low power sub-1GHz transceiver in a standalone RF Module tuned for 860-940 MHz frequency bands STM32 Nucleo-64 development board with STM32L0 MCU Suitable for Wireless M-Bus systems Associated S2-LP development kit including, documentation, firmware for STM32L and GUI Programmable RF output power up to +16 dBm Modulation schemes: 2-FSK, 2-GFSK, 4-FSK, 4-GFSK, OOK, and ASK Air data rate from 0.3 to 500 kbps Ultra-low power consumption: 6.7 mA RX 10 mA TX +10 dBm Excellent performance of receiver sensitivity (up to -130 dBm) Low duty cycle RX/TX operation mode Automatic acknowledgement, retransmission, and timeout protocol engine SPI interface for microcontroller USB interface RoHS compliant Description Summary table The STEVAL-FKI868V2 evaluation board is based on the S2-LP sub-1GHz ultra-low power low data-rate transceiver suitable for ISM bands and wireless M-Bus. The STEVAL-FKI868V2 STEVAL-FKI868V2 evaluation board NUCLEO-L053R8 motherboard is equipped with an STM32L0 low power microcontroller to control the S2-LP. STM32 Nucleo-64 development board The board integrates a ST-LINK/V2-1 debugger/programmer for firmware updating. NUCLEO-L053R8 with STM32L053R8 MCU ultra-low power, high performance, S2-LP sub-1GHz transceiver STM32L0 series of ultra-low-power STM32L0 MCUs ST-LINK/V2 in- circuit debugger/ ST-LINK/V2 programmer for STM8 and STM32 DB3512 - Rev 3 - June 2018 www.st.com For further information contact your local STMicroelectronics sales office. STEVAL-FKI868V2 Schematic diagram 1 Schematic diagram Figure 1. STEVAL-FKI868V2 circuit schematic VDD VDD VDD VDD VDDS MP S VDDVC O TX VDDANAS YNTH VDDR XDIG C1 C33 C3 C4 C7 C8 3V3 C5 C6 C2 100pF 100pF 150nF 150nF 100pF 150nF 150nF 100pF 4. 7uF R1 R2 100K 100K U1 1 8 nS Vcc CN1 2 7 Q nHOL D 3 6 C9 nW C 4 5 100nF Vss D 10 9 M95640 R19 8 VS MP S 2 150nF 7 R3 R6 NM S C LK C10 NM 100K 6 R4 0R S DO 5 R5 S DI 4 0R R9 C S N 3 R27 D9 NM 2 R7 0R n S C11 1 0R 100pF Header 10X1 Female 1.4 V to 1.8 V max U2 C32 Vsmps ext C12 1uF 150nF 1 18 CN2 R20 L1 C13 L2 10uH VDDS M P S S CL K 2 17 1.5pF S M P S 1 S DI C14 0R 18nH R10 0R 3 16 S DN NM S M P S 2 S DO 8 XO UT 4 15VDDR XDIG C16 J1 XOUT VDDRXDI G L3 R21 7 0R XIN 5 14 100pF 27nH XI N RXP C15 6 6 13 L4 S DN RXN C17 NM 5 R11 0R 100pF S M A RF Connect or s 4 VS MP S 2 3 100pF C18 C38 S2-LP 18nH 2 1.5pF 1.8pF 1 L5 VDD VDDANAS YNTH R17 C21 Header 8X1 Female 100pF C22 NM C23 150nF VR S YNTH VDD 100pF R22 CN3 Y1 C36 R29 NM L7 4 3 VS MP S 2 C19 1 Jumper 0R C25 0R 12nH 12pF 2 VDD C37 1 2 470pF C35 3V3 C34 3 NM 100pF 1 2 150nF 4 1 2 XTAL 50 MHz 5 C24 1.2 pF 6 JP1 7 8 4.3 nH 6.2 nH 5.6 nH Header 8X1 Female L8 L9 L10 XIN C20 C27 C28 C29 12pF C26 TC XO E N 3.9 pF 5.6 pF 2.7 pF NM L6 0R CN4 R30 R18 VS MP S 2 VR S YNTH 0R R12 NM 10R 1 CN5 VDD C30 C31 R13 2 150nF 100pF R14 0R G P IO 1 1 3 0R TC XO E N R15 G P IO 2 2 4 D9 0R 3 5 R16 G P IO 3 6 Enable TCXO 0R Header 6X1 Female DB3512 - Rev 3 page 2/4 R24 R26 NM NM R23 R25 0R 0R R28 NM XIN XO UT 7 24 VD DANAS YNT H V RDI G VR S YNTH 8 23 VR S YNT H GP I O3 9 22 VR EF VC O GP I O2 VDDVC O T X 10 21 VD DVCOT X GP I O1 11 20 T X GP I O0 12 19 VR RF CS N 25 GN D