STHVDAC-253C7 Datasheet BST capacitance controller, 350 m pitch Features Dedicated controller to bias BST tunable capacitances Turbo and Glide Modes for optimal system performance Integrated boost converter with 3 programmable outputs (from 0 to 24 V) Low power consumption and high accuracy thanks to production trimming MIPI RFFE v2.0 serial interface 1,8 V with extended frequency range up to 52 Flip Chip 0.35 mm pitch MHz (12 bumps) Synchronous reads support (sRead) 3 USID support in order to control 3 antennas with a single device GPIO for Register swap to support DPDT switching and USB cable plugged in Available in 350 microns pitch WLCSP for stand-alone or SiP module integration WLCSP package is not sensitive to moisture (MSL = 1) Benefits RF tunable passive implementation in mobile phones to optimize the radiated performance Applications Cellular Antenna tunable matching network in multi-band GSM/WCDMA/LTE handsets Compatible for open loop antenna tuner application Product status link Description STHVDAC-253C7 The ST high voltage BST capacitance controller STHVDAC-253C7 is a high voltage Digital to Analog Converter (DAC), specifically designed to control and meet the wide tuning bias voltage requirement of the BST tunable capacitances. It provides three independent high voltage outputs to control three different capacitances. It is fully controlled through an RFFE serial interface. BST capacitances are tunable capacitances intended for use in mobile phone application, and dedicated to RF tunable application. They are controlled through a bias voltage ranging from 0 to 24 V. The implementation of BST tunable capacitance in mobile phones enables a significant improvement in terms of radiated performance, making the performance almost insensitive to external environment. DS12431 - Rev 7 - November 2020 www.st.com For further information contact your local STMicroelectronics sales office.STHVDAC-253C7 Figure 1. HVDAC functional block diagram BOOST DIODE sense VHV B1 IND C1 VHV BOOST drive BOOST POWER CONTROL MOS HVAMP A1 OUTA 7 Bit DAC A GND PWR C2 GPIO 7 Bit DAC B 7 Bit DAC C GPIO C3 7 Bit DAC A HVAMP A2 OUTB 3 WIRE 7 Bit DAC B INTERFACE & CLK D2 7 Bit DAC C REGISTER BANK DATA D1 DAC MODE TURBO / GLIDE HVAMP OUTC A3 LDO GND REF & POWER MANAGEMENT BIASING & REFERENCE CONTROL LOGIC TEST & TRIMMING D3 B2 B3 VIO AVDD GND REF DS12431 - Rev 7 page 2/32