STL10N65M2 Datasheet N-channel 650 V, 0.85 typ., 4.5 A MDmesh M2 Power MOSFET in a PowerFLAT 5x6 HV package Features V R max. I Order code DS DS(on ) D STL10N65M2 650 V 1.00 4.5 A 1 2 Extremely low gate charge 3 4 Excellent output capacitance (C ) profile OSS PowerFLAT 5x6 HV 100% avalanche tested Zener-protected D(5, 6, 7, 8) 8 7 6 5 Applications Switching applications G(4) Description This device is an N-channel Power MOSFET developed using MDmesh M2 1 2 3 4 technology. Thanks to its strip layout and an improved vertical structure, the device Top View S(1, 2, 3) exhibits low on-resistance and optimized switching characteristics, rendering it AM15540v1 suitable for the most demanding high efficiency converters. Product status link STL10N65M2 Product summary Order code STL10N65M2 Marking 10N65M2 Package PowerFLAT 5x6 HV Packing Tape and reel DS12063 - Rev 2 - June 2019 www.st.com For further information contact your local STMicroelectronics sales office.STL10N65M2 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit V Gate-source voltage 25 V GS Drain current (continuous) at T = 25 C 4.5 A C I D Drain current (continuous) at T = 100 C 2.8 A C (1) I Drain current pulsed 18 A DM P Total power dissipation at T = 25 C 48 W TOT C I Avalanche current, repetitive or non-repetitive (pulse width limited by T max) 0.9 A AR J E Single pulse avalanche energy (starting T = 25 C, I = I , V = 50 V) 95 mJ AS J D AR DD (2) dv/dt Peak diode recovery voltage slope 15 V/ns (3) dv/dt MOSFET dv/dt ruggedness 50 T Operating junction temperature range J -55 to 150 C T Storage temperature range stg 1. Pulse width is limited by safe operating area. 2. I 4.5 A, di/dt 400 A/s, V V , V = 400 V. SD DS(peak) (BR)DSS DD 3. V 520 V. DS Table 2. Thermal data Symbol Parameter Value Unit R Thermal resistance junction-case 2.6 C/W thj-case (1) R Thermal resistance junction-pcb 50 C/W thj-pcb 1. When mounted on 1 inch FR-4 board, 2 oz Cu. DS12063 - Rev 2 page 2/15