STM32F479xx ARM Cortex -M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/384+4KB RAM, USB OTG HS/FS, Ethernet, FMC, dual Quad-SPI, Crypto, Graphical accelerator, Camera IF, LCD-TFT & MIPI DSI Datasheet - production data Features Core: ARM 32-bit Cortex -M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution LQFP100 (14 14 mm) UFBGA169 (7 7 mm) WLCSP168 from Flash memory, frequency up to 180 MHz, LQFP144 (20 20 mm) UFBGA176 (10 x 10 mm) LQFP176 (24 24 mm) MPU, 225 DMIPS/1.25 DMIPS/MHz TFBGA216 (13 x 13 mm) LQFP208 (28 28 mm) (Dhrystone 2.1), and DSP instructions Debug mode Memories SWD & JTAG interfaces Up to 2 MB of Flash memory organized into two banks allowing read-while-write Cortex -M4 Trace Macrocell Up to 384+4 KB of SRAM including 64-KB of Up to 161 I/O ports with interrupt capability CCM (core coupled memory) data RAM Up to 157 fast I/Os up to 90 MHz Flexible external memory controller with up to Up to 159 5 V-tolerant I/Os 32-bit data bus: SRAM, PSRAM, Up to 21 communication interfaces SDRAM/LPSDR, SDRAM, Flash NOR/NAND 2 Up to 3 I C interfaces (SMBus/PMBus) memories Up to 4 USARTs and 4 UARTs (11.25 Mbit/s, Dual-flash mode Quad-SPI interface ISO7816 interface, LIN, IrDA, modem control) Graphics: Up to 6 SPIs (45 Mbits/s), 2 with muxed full- 2 Chrom-ART Accelerator (DMA2D), graphical duplex I S for audio class accuracy via internal hardware accelerator enabling enhanced audio PLL or external clock graphical user interface with minimum CPU load 1 x SAI (serial audio interface) LCD parallel interface, 8080/6800 modes 2 CAN (2.0B Active) LCD TFT controller supporting up to XGA SDIO interface resolution Advanced connectivity MIPI DSI host controller supporting up to 720p USB 2.0 full-speed device/host/OTG controller 30Hz resolution with on-chip PHY USB 2.0 high-speed/full-speed device/host/OTG Clock, reset and supply management controller with dedicated DMA, on-chip full- 1.7 V to 3.6 V application supply and I/Os speed PHY and ULPI POR, PDR, PVD and BOR Dedicated USB power rail enabling on-chip 4-to-26 MHz crystal oscillator PHYs operation throughout the entire MCU Internal 16 MHz factory-trimmed RC (1% power supply range accuracy) 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII 32 kHz oscillator for RTC with calibration 8- to 14-bit parallel camera interface up to Internal 32 kHz RC with calibration 54 Mbytes/s Low power Cryptographic accelerator Sleep, Stop and Standby modes HW accelerator for AES 128, 192, 256, Triple V supply for RTC, 2032 bit backup registers BAT DES, HASH (MD5, SHA-1, SHA-2) and HMAC + optional 4 KB backup SRAM True random number generator 312-bit, 2.4 MSPS ADC: up to 24 channels CRC calculation unit and 7.2 MSPS in triple interleaved mode RTC: subsecond accuracy, hardware calendar 212-bit D/A converters 96-bit unique ID General-purpose DMA: 16-stream DMA controller with FIFOs and burst support Table 1. Device summary Up to 17 timers: up to twelve 16-bit and two 32- bit timers up to 180 MHz, each with up to 4 Reference Part numbers IC/OC/PWM or pulse counter and quadrature STM32F479AI, STM32F479AG, STM32F479BI, (incremental) encoder input. 2x watchdogs and STM32F479BG, STM32F479II, STM32F479IG, STM32F479xx SysTick timer STM32F479NI, STM32F479NG, STM32479VG, STM32479VI, STM32479ZG, STM32479ZI March 2016 DocID028010 Rev 3 1/217 This is information on a product in full production. www.st.comContents STM32F479xx Contents 1 Description 12 1.1 Compatibility throughout the family . 15 1.1.1 LQFP176 package . 16 1.1.2 LQFP208 package . 17 1.1.3 UFBGA176 package . 18 1.1.4 TFBGA216 package . 19 2 Functional overview 21 2.1 ARM Cortex -M4 with FPU and embedded Flash and SRAM . 21 2.2 Adaptive real-time memory accelerator (ART Accelerator) . 21 2.3 Memory protection unit . 21 2.4 Embedded Flash memory 22 2.5 CRC (cyclic redundancy check) calculation unit . 22 2.6 Embedded SRAM . 22 2.7 Multi-AHB bus matrix 22 2.8 DMA controller (DMA) . 23 2.9 Flexible Memory Controller (FMC) 24 2.10 Quad-SPI memory interface (QUADSPI) . 25 2.11 LCD-TFT controller 25 2.12 DSI Host (DSIHOST) 25 2.13 Chrom-ART Accelerator (DMA2D) 27 2.14 Nested vectored interrupt controller (NVIC) . 27 2.15 External interrupt/event controller (EXTI) . 27 2.16 Clocks and startup 28 2.17 Boot modes . 28 2.18 Power supply schemes 28 2.19 Power supply supervisor . 30 2.19.1 Internal reset ON 30 2.19.2 Internal reset OFF . 30 2.20 Voltage regulator . 31 2.20.1 Regulator ON . 31 2.20.2 Regulator OFF 32 2/217 DocID028010 Rev 3