TPDV840RG STMicroelectronics

TPDVxx40 40 A high voltage Triacs Datasheet - production data Description The TPDVxx40 series use a high performance alternistor technology. Featuring very high commutation levels and high surge current * capability, this family is well adapted to power control on inductive load (motor, transformer...). Table 1. Device summary Blocking On-state Gate * Parameter voltage current current V /V I I DRM RRM T(RMS) GT 23 LQVXODWHG 7 TPDV640RG 600 V TPDV840RG 800 V 40 A 200 mA Features TPDV1240RG 1200 V On-state current (I ): 40 A T(RMS) Max. blocking voltage (V /V ): 1200 V DRM RRM Gate current (I ): 200 mA GT Commutation at 10 V/s: up to 142 A/ms Noise immunity: 500 V/s Insulated package: 2,500 V rms (UL recognized: E81734) June 2015 DocID18270 Rev 2 1/8 This is information on a product in full production. www.st.comCharacteristics TPDVxx40 1 Characteristics Table 2. Absolute ratings (limiting values) Symbol Parameter Value Unit I On-state rms current (180 conduction angle) T = 75 C 40 A T(RMS) c t = 2.5 ms 590 p Non repetitive surge peak on-state I t = 8.3 ms T = 25 C 370 A TSM p j current t = 10 ms 350 p 2 2 2 ItI t value for fusing t = 10 ms T = 25 C 610 A S p j Repetitive F = 50 Hz 20 Critical rate of rise of on-state current dI/dt A/s I = 500 mA dl /dt = 1 A/s G G Non repetitive 100 TPDV640 600 V DRM Repetitive peak off-state voltage TPDV840 T = 125 C 800 V j V RRM TPDV1240 1200 Storage junction temperature range -40 to +150 T stg C T Operating junction temperature range -40 to +125 j T Maximum lead temperature for soldering during 10 s at 2 mm from case 260 C L (1) V Insulation rms voltage 2500 V INS(RMS) 1. A1, A2, gate terminals to case for 1 minute Table 3. Electrical Characteristics (T = 25 C, unless otherwise specified) j Symbol Test condition Quadrant Value Unit I Max. 200 mA GT V = 12 V DC, R = 33 I - II - III D L V Max. 1.5 V GT V V = V R = 3.3 k T = 125 C I - II - III Min. 0.2 V GD D DRM L j t V = V I = 500 mA dl /dt = 3A/s I - II - III Typ. 2.5 s gt D DRM G G (1) I I = 500 mA Gate open Typ. 50 mA H T I - III 100 I I = 1.2 x I Typ. mA L G GT II 200 Linear slope up to : dV/dt T = 125 C Min. 500 V/s j V = 67% V Gate open D DRM (1) V I = 56 A t = 380 s Max. 1.8 V TM TM p T = 25 C 20 A I j DRM V V Max. DRM = RRM I RRM T = 125 C 8 mA j (dV/dt)c = 200 V/s 35 (1) (dI/dt)c T = 125 C Min. A/ms j (dV/dt)c = 10 V/s 142 1. For either polarity of electrode A voltage with reference to electrode A . 2 1 2/8 DocID18270 Rev 2