TBD62089APG Toshiba

TBD62089APG TOSHIBA BiCD Integrated Circuit Silicon Monolithic TBD62089APG 8-ch Sink Type DMOS Transistor Array with D-type Flip-Flop The TBD62089APG is an 8-ch DMOS transistor array with D-type flip-flop. Please be careful about thermal conditions during use. Features Built-in 8 circuits High output voltage : V = 50 V (max) OUT DIP20-P-300-2.54A High output current : I = 500 mA/ch (max) OUT Package : DIP20-P-300-2.54A Weight: 1.4 g (typ.) Pin assignment (top view) VDD /Y1 /Y2 /Y3 /Y4 /Y5 /Y6 /Y7 /Y8 GND /CLR D1 D2 D3 D4 D5 D6 D7 D8 CLK 2016-12-21 1 2016 Toshiba Corporation TBD62089APG Pin description Pin No. Pin name Function 1 /CLR Clear signal input pin 2 D1 Data signal input pin 3 D2 Data signal input pin 4 D3 Data signal input pin 5 D4 Data signal input pin 6 D5 Data signal input pin 7 D6 Data signal input pin 8 D7 Data signal input pin 9 D8 Data signal input pin 10 CLK Clock signal input pin 11 GND Ground pin 12 /Y8 Output pin 13 /Y7 Output pin 14 /Y6 Output pin 15 /Y5 Output pin 16 /Y4 Output pin 17 /Y3 Output pin 18 /Y2 Output pin 19 /Y1 Output pin 20 VDD Power supply pin Block diagram /Y1 /Y2 /Y3 /Y4 /Y5 /Y6 /Y7 /Y8 VDD D D D D D D D D Q Q Q Q Q Q Q Q CK CK CK CK CK CK CK CK CLK 100k R R R R R R R R (typ.) /CLR 100k 100k 100k 100k 100k 100k 100k 100k 100k (typ.) (typ.) (typ.) (typ.) (typ.) (typ.) (typ.) (typ.) (typ.) D1 D2 D3 D4 D5 D6 D7 D8 GND Equivalent circuit may be omitted or simplified for explanatory purpose. Function table INPUT OUTPUT: /Y /CLR CLK D L X X H H L H H H L H L X Y0 H X Y0 : L to H : H to L H: High level L: Low level X: Dont care Y0: /Y level just before inputting conditions in the table are fixed *: Operating conditions in the table: OUTPUT is connected to the power supply through resistors. 2016-12-21 2