TC74VHCT245AFT(E,K Toshiba

TC74VHCT245AF/AFT/AFK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHCT245AF,TC74VHCT245AFT,TC74VHCT245AFK Octal Bus Transceiver The TC74VHCT245A is an advanced high speed CMOS OCTAL TC74VHCT245AF 2 BUS TRANSCEIVER fabricated with silicon gate C MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. It is intended for two-way asynchronous communication between data busses. The direction of data transmission is determined by the level of the DIR input. The enable input ( G ) can be used to disable the device so that the busses are effectively isolated. The input voltage are compatible with TTL output voltage. TC74VHCT245AFT This device may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 to 5.5 V can (Note) be applied to the input and output pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc. Note: Output in off-state TC74VHCT245AFK Features (Note) High speed: t = 4.9 ns (typ.) at V = 5 V pd CC Low power dissipation: I = 4 A (max) at Ta = 25C CC Compatible with TTL inputs: V = 0.8 V (max) IL V = 2.0 V (min) IH Power down protection is provided on all inputs and outputs Balanced propagation delays: t t pLH pHL Low noise: V = 1.5 V (max) OLP Weight SOP20-P-300-1.27A: 0.22 g (typ.) Pin and function compatible with the 74 series TSSOP20-P-0044-0.65A: 0.08 g (typ.) (74AC/HC/F/ALS/LS etc.) 245 type. VSSOP20-P-0030-0.50: 0.03 g (typ.) Note: Do not apply a signal to any bus terminal when it is in the output mode. Damage may result. All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull down resistors. 1 2008-12-01 TC74VHCT245AF/AFT/AFK Pin Assignment IEC Logic Symbol (19) G3 G DIR 1 20 V CC (1) DIR 3 EN 1 BA A1 2 19 G 3 EN 2 AB A2 18 B1 3 (2) (18) A1 1 B1 A3 4 17 B2 2 (3) (17) A2 B2 A4 5 16 B3 (4) (16) A5 6 15 B4 A3 B3 A6 7 14 B5 (5) (15) A4 B4 A7 8 13 B6 (6) (14) A5 B5 A8 9 12 B7 (7) (13) A6 B6 GND 10 11 B8 (8) (12) A7 B7 (top view) (9) (11) A8 B8 Truth Table Inputs Function Output G DIR A Bus B Bus L L Output Input A = B L H Input Output B = A H X Z Z X: Dont care Z: High impedance 2 2008-12-01