CHP4012-QEG

CHP4012-QEG RoHS COMPLIANT S-Band 6-bit Digital Phase Shifter GaAs Monolithic Microwave IC in SMD leadless package Description The CHP4012-QEG is a 6-bit phase shifter monolithic circuit, which integrates a CMOS UMS and TTL compatible interface. It is designed for a wide range of P4012 applications, typically defence and space YYWW systems. The circuit is manufactured with a pHEMT process, 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is supplied in RoHS compliant SMD package. Main Features Frequency range: 2.7-3.5GHz 5.625 phase shifter step 0-360 phase shift range RMS peak phase error: 1 Digital interface 24L-QFN4x5 MSL1 Main Characteristics Tamb.= +25C Symbol Parameter Min Typ Max Unit Freq Frequency range 2.7 3.5 GHz Ls Insertion Loss 5.5 dB RMS PPE RMS Peak Phase Error 1 Ref. : DSCHP4012-QEG0326 - 22 Nov 10 1/12 Specifications subject to change without notice United Monolithic Semiconductors S.A.S. Route Dpartementale 128 - BP46 - 91401 Orsay Cedex France Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09 CHP4012-QEG S-Band 6-bit Digital Phase Shifter Main Characteristics Tamb.= +25C Symbol Parameter Min Typ Max Unit Freq Frequency range 2.7 3.5 GHz PhS Phase Shift Range 0 360 PhS step Phase Shift Step 5.625 PPE Peak Phase Error -2 / +4 RMS PPE RMS Peak Phase Error 1 Ls Insertion Loss 6.0 dB Av Amplitude Variation +/-0.5 dB RMS Av RMS Amplitude Variation 0.2 dB S11 Input Reflection Coefficient -15 dB S22 Output Reflection Coefficient -15 dB P1dB Input Power at 1dB gain compression 24.5 dBm Vctrl L Control Input Voltage (P1-P6) low level 0 0.4 V Vctrl H Control Input Voltage (P1-P6) high level 2.4 3.3 7 V V+ Positive Supply Voltage +5 V V- Negative Supply Voltage -5 V I+ Positive Supply Current 5 mA I- Negative Supply Current 5 mA SwT Switching Time 15 ns Top Operating Temperature -40 +85 C These values are representative of onboard measurements as defined on the drawing in paragraphEvaluation mother boar. Peak Phase Error (PPE) definition: PPE =measured phase(S21) measured phase(S21) theoretical phase (i) (i) (0) (i) where (i) is the state (from 0 to 63) RMS Peak Phase Error (RMS PPE) definition: 63 2 (PPE(i) - PPE) i=0 RMS PPE = 64 63 PPE(i) i=0 with PPE = 64 Insertion Losses Variation (LsV) definition: LsV =measured dB(S21) measured dB(S21) (i) (i) (0) where is the state (from 0 to 63) (i) Ref. : DSCHP4012-QEG0326 - 22 Nov 10 2/12 Specifications subject to change without notice Route Dpartementale 128, BP46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09