VS-40TPS...PbF Series, VS-40TPS...-M3 Series www.vishay.com Vishay Semiconductors Thyristor High Voltage, Phase Control SCR, 40 A FEATURES 2 Designed and qualified according to (A) JEDEC -JESD 47 Low I parts available GT 125 C max. operating junction temperature Material categorization: for definitions of compliance please see 1 (K) (G) 3 www.vishay.com/doc 99912 Available TO-247AC APPLICATIONS PRODUCT SUMMARY Typical usage is in input rectification crowbar (soft start) and AC switch motor control, UPS, welding and battery Package TO-247AC charge Diode variation Single SCR I 35 A T(AV) DESCRIPTION V /V 800 V, 1200 V DRM RRM The VS-40TPS... high voltage series of silicon controlled V 1.45 V rectifiers are specifically designed for medium power TM switching and phase control applications. The glass I 150 mA GT passivation technology used has reliable operation up to T -40 C to +125 C J 125 C junction temperature. MAJOR RATINGS AND CHARACTERISTICS PARAMETER TEST CONDITIONS VALUES UNITS I Sinusoidal waveform 35 T(AV) A I 55 RMS V /V 800/1200 V RRM DRM I 600 A TSM V 40 A, T = 25 C 1.45 V T J dV/dt 1000 V/s dI/dt 100 A/s T -40 to +125 C J VOLTAGE RATINGS V /V , MAXIMUM V , MAXIMUM RRM DRM RSM I /I RRM DRM REPETITIVE PEAK AND NON-REPETITIVE PEAK PART NUMBER AT 125 C OFF-STATE VOLTAGE REVERSE VOLTAGE mA V V VS-40TPS08APbF, VS-40TPS08A-M3 800 900 VS-40TPS08PbF, VS-40TPS08-M3 800 900 10 VS-40TPS12APbF, VS-40TPS12A-M3 1200 1300 VS-40TPS12PbF, VS-40TPS12-M3 1200 1300 Revision: 02-Jun-15 Document Number: 94388 1 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000VS-40TPS...PbF Series, VS-40TPS...-M3 Series www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS Maximum average on-state current I T = 79 C, 180 conduction half sine wave 35 T(AV) C Maximum continuous RMS I 55 T(RMS) on-state current as AC switch A 10 ms sine pulse, rated V applied 500 Maximum peak, one-cycle RRM I TSM non-repetitive surge current 10 ms sine pulse, no voltage reapplied 600 Initial 10 ms sine pulse, rated V applied 1250 RRM 2 2 T = T max. 2 Maximum I t for fusing I t J J A s 10 ms sine pulse, no voltage reapplied 1760 2 2 2 Maximum I t for fusing I t t = 0.1 ms to 10 ms, no voltage reapplied 17 600 A s Low level value of threshold voltage V 1.02 T(TO)1 V High level value of threshold voltage V 1.23 T(TO)2 T = 125 C J Low level value of on-state slope resistance r 9.74 t1 m High level value of on-state slope resistance r 7.50 t2 Maximum peak on-state voltage V 110 A, T = 25 C 1.85 V TM J Maximum rate of rise of turned-on current dI/dt T = 25 C 100 A/s J Maximum holding current I Anode supply = 6 V, resistive load, initial T = 1 A, I = 25 C 200 H J T Maximum latching current I Anode supply = 6 V, resistive load, T = 25 C 300 L J mA T = 25 C 0.5 J Maximum reverse and direct leakage current I I V = Rated V /V RRM/ DRM R RRM DRM T = 125 C 10 J Maximum rate of rise of off-state voltage 500 40TPS12A dV/dt T = T maximum, linear to 80 % V , R - k = 100 V/s J J DRM g Maximum rate of rise of off-state voltage 1000 40TPS12 TRIGGERING PARAMETER SYMBOL TEST CONDITIONS VALUESUNITS Maximum peak gate power P 10 GM W Maximum average gate power P 2.5 G(AV) Maximum peak gate current I 2.5 A GM Maximum peak negative gate voltage - V 10 V GM T = - 40 C 4.0 J Anode supply = 6 V Maximum required DC gate voltage to trigger V T = 25 C 2.5 V GT J resistive load T = 125 C 1.7 J T = - 40 C 270 J Anode supply = 6 V T = 25 C 150 J resistive load Maximum required DC gate current to trigger I mA GT T = 125 C 80 J T = 25 C, for 40TPS08APbF and 40TPS12APbF 40 J Maximum DC gate voltage not to trigger V 0.25 V GD for 40TPS12 T = 125 C, V = Rated value J DRM Maximum DC gate current not to trigger I 6mA GD for 40TPS12 Maximum DC gate voltage not to trigger V 0.15 V GD for 40TPS12A T = 125 C, V = Rated value J DRM Maximum DC gate current not to trigger I 1mA GD for 40TPS12A Revision: 02-Jun-15 Document Number: 94388 2 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000