SiA921EDJ Vishay Siliconix Dual P-Channel 20 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET V (V) R ( )I (A) Q (Typ.) DS DS(on) D g Thermally Enhanced PowerPAK SC-70 a 0.059 at V = - 4.5 V Package GS - 4.5 - 20 4.9 nC - Small Footprint Area a 0.098 at V = - 2.5 V GS - 4.5 - Low On-Resistance Typical ESD Protection: 1700 V PowerPAK SC-70-6 Dual High Speed Switching 1 Material categorization: S 1 For definitions of compliance please see 2 G www.vishay.com/doc 99912 1 3 D 1 D 2 APPLICATIONS D 1 Load Switch, PA Switch and Battery Switch for Portable D 2 6 Devices G 2 5 2.05 mm DC/DC Converters 2.05 mm S 2 S S 4 1 2 Ordering Information: SiA921EDJ-T1-GE3 (Lead (Pb)-free and Halogen-free) SiA921EDJ-T4-GE3 (Lead (Pb)-free and Halogen-free) G G 1 2 Marking Code D F X Part code X X X P-Channel MOSFET P-Channel MOSFET Lot Traceability D D 1 2 and Date code ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit V - 20 Drain-Source Voltage DS V Gate-Source Voltage V 12 GS a T = 25 C - 4.5 C a T = 70 C - 4.5 C Continuous Drain Current (T = 150 C) I J D a, b, c T = 25 C - 4.5 A b, c T = 70 C A - 3.7 A I - 15 Pulsed Drain Current DM a T = 25 C - 4.5 C Continuous Source-Drain Diode Current I S b, c T = 25 C - 1.6 A T = 25 C 7.8 C T = 70 C 5 C Maximum Power Dissipation P W D b, c T = 25 C 1.9 A b, c T = 70 C 1.2 A Operating Junction and Storage Temperature Range T , T - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 5 s R 52 65 Maximum Junction-to-Ambient thJA C/W Maximum Junction-to-Case (Drain) Steady State R 12.5 16 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 5 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SC-70 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 110 C/W. Document Number: 64734 www.vishay.com For technical questions, contact:: pmostechsupport vishay.com S12-2731-Rev. C, 12-Nov-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000SiA921EDJ Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static V V = 0 V, I = - 250 A Drain-Source Breakdown Voltage - 20 V DS GS D V Temperature Coefficient V /T - 14 DS DS J I = - 250 A mV/C D V Temperature Coefficient V /T 2.5 GS(th) GS(th) J V V = V , I = - 250 A Gate-Source Threshold Voltage - 0.5 - 1.4 V GS(th) DS GS D V = 0 V, V = 4.5 V 1 DS GS I Gate-Source Leakage GSS V = 0 V, V = 12 V 10 DS GS A V = - 20 V, V = 0 V - 1 DS GS I Zero Gate Voltage Drain Current DSS V = - 20 V, V = 0 V, T = 55 C - 10 DS GS J a I V - 5 V, V = - 4.5 V - 15 A On-State Drain Current D(on) DS GS V = - 4.5 V, I = - 3.6 A 0.048 0.059 GS D a R Drain-Source On-State Resistance DS(on) V = - 2.5 V, I = - 1.5 A 0.080 0.098 GS D a g V = - 10 V, I = - 3.6 A 11 S Forward Transconductance fs DS D b Dynamic V = - 10 V, V = - 10 V, I = - 4.7 A 15 23 DS GS D Total Gate Charge Q g 7.1 11 nC Q Gate-Source Charge V = - 10 V, V = - 4.5 V, I = - 4.7 A 1.3 gs DS GS D Q Gate-Drain Charge 2.1 gd R Gate Resistance f = 1 MHz 6.3 g t Turn-On Delay Time 20 30 d(on) t Rise Time V = - 10 V, R = 2.7 20 30 r DD L I - 3.7 A, V = - 4.5 V, R = 1 t Turn-Off Delay Time D GEN g 25 40 d(off) t Fall Time 10 15 f ns t Turn-On Delay Time 510 d(on) Rise Time t 12 20 V = - 10 V, R = 2.7 r DD L I - 3.7 A, V = - 10 V, R = 1 t Turn-Off Delay Time D GEN g 25 40 d(off) Fall Time t 10 15 f Drain-Source Body Diode Characteristics I T = 25 C Continuous Source-Drain Diode Current - 4.5 S C A Pulse Diode Forward Current I - 15 SM V I = - 3.7 A, V = 0 V Body Diode Voltage - 0.9 - 1.2 V SD S GS t Body Diode Reverse Recovery Time 15 30 ns rr Q Body Diode Reverse Recovery Charge 612 nC rr I = - 3.7 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 8.5 a ns t Reverse Recovery Rise Time 6.5 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 64734 For technical questions, contact:: pmostechsupport vishay.com 2 S12-2731-Rev. C, 12-Nov-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000