New Product SiR642DP Vishay Siliconix N-Channel 40 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET a V (V) R ( ) Max. I (A) Q (Typ.) DS DS(on) D g Low Q for High Efficiency g 0.0024 at V = 10 V 60 GS 100 % R and UIS Tested g 40 27.2 nC 0.0030 at V = 4.5 V 60 Material categorization: GS For definitions of compliance please see www.vishay.com/doc 99912 PowerPAK SO-8 APPLICATIONS S 6.15 mm 5.15 mm D 1 Synchronous Rectification S 2 S DC/DC Converter 3 G 4 D 8 D G 7 D 6 D 5 Bottom View Ordering Information: S SiR642DP-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit Drain-Source Voltage V 40 DS V V 20 Gate-Source Voltage GS a T = 25 C 60 C a T = 70 C 60 C Continuous Drain Current (T = 150 C) I J D b, c T = 25 C 35.4 A b, c T = 70 C 28 A A Pulsed Drain Current (t = 300 s) I 100 DM a T = 25 C 60 C Continuous Source-Drain Diode Current I S b, c T = 25 C 5.6 A Single Pulse Avalanche Current I 35 AS L = 0.1 mH E mJ Single Pulse Avalanche Energy 61.25 AS T = 25 C 83 C T = 70 C 53 C Maximum Power Dissipation P W D b, c T = 25 C 5.4 A b, c T = 70 C 3.4 A Operating Junction and Storage Temperature Range T , T - 55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f Maximum Junction-to-Ambient t 10 s R 18 23 thJA C/W Maximum Junction-to-Case (Drain) Steady State R 11.5 thJC Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 65 C/W. Document Number: 62559 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S12-2054-Rev. A, 27-Aug-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000New Product SiR642DP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 40 V DS GS D V Temperature Coefficient V /T I = 250 A - 5.1 mV/C GS(th) GS(th) J D V V = V , I = 250 A Gate-Source Threshold Voltage 1.2 2.3 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 40 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 40 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 50 A On-State Drain Current D(on) DS GS V = 10 V, I = 15 A 0.0019 0.0024 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 10 A 0.0025 0.0030 GS D a g V = 15 V, I = 15 A 70 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 4155 iss C V = 20 V, V = 0 V, f = 1 MHz Output Capacitance 3125 pF oss DS GS C Reverse Transfer Capacitance 223 rss V = 20 V, V = 10 V, I = 10 A 56 84 DS GS D Q Total Gate Charge g 27.2 41 nC Q V = 20 V, V = 4.5 V, I = 10 A Gate-Source Charge 9.4 gs DS GS D Q Gate-Drain Charge 6.7 gd Gate Resistance R f = 1 MHz 0.2 0.75 1.5 g t Turn-On Delay Time 14 28 d(on) Rise Time t 11 20 V = 20 V, R = 2 r DD L I 10 A, V = 10 V, R = 1 t Turn-Off Delay Time D GEN g 36 70 d(off) t Fall Time 918 f ns Turn-On Delay Time t 30 60 d(on) t Rise Time V = 20 V, R = 2 105 180 r DD L I 10 A, V = 4.5 V, R = 1 t 38 75 Turn-Off Delay Time D GEN g d(off) t Fall Time 12 50 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I T = 25 C 60 S C A a I 100 Pulse Diode Forward Current SM Body Diode Voltage V I = 5 A 0.72 1.1 V SD S t Body Diode Reverse Recovery Time 67 130 ns rr Q Body Diode Reverse Recovery Charge 57 115 nC rr I = 10 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t 24 a ns t Reverse Recovery Rise Time 43 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Document Number: 62559 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S12-2054-Rev. A, 27-Aug-12 2 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000