3 mm New Product SiZ300DT Vishay Siliconix Dual N-Channel 30 V (D-S) MOSFETs FEATURES PRODUCT SUMMARY PowerPAIR Optimizes High-Side and Low-Side a V (V) R ( ) Q (Typ.) MOSFETs for Synchronous Buck Converters I (A) DS DS(on) g D TrenchFET Power Mosfets 0.0240 at V = 10 V 11 GS Channel-1 30 3.5 nC 100 % R and UIS Tested 0.0320 at V = 4.5 V 11 g GS Material categorization: For definitions of 0.0110 at V = 10 V 28 GS Channel-2 30 6.8 nC compliance please see www.vishay.com/doc 99912 0.0165 at V = 4.5 V 28 GS APPLICATIONS Computing System Power PowerPAIR 3 x 3 POL Pin 1 Synchronous Buck Converter G 1 D 1 1 D 1 D 1 2 D 1 D 3 1 4 S /D 1 2 G 1 8 (Pin 9) G 2 7 N-Channel 1 S /D S 1 2 2 MOSFET 6 S 2 5 S 2 G 2 N-Channel 2 MOSFET Ordering Information: S 2 SiZ300DT-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol Channel-1Channel-2Unit V 30 Drain-Source Voltage DS V V Gate-Source Voltage 20 GS a a T = 25 C C 11 28 a a T = 70 C C 11 28 I Continuous Drain Current (T = 150 C) D J b, c b, c T = 25 C A 9.8 14.9 b, c b, c T = 70 C A 7.8 11.9 A I 30 40 Pulsed Drain Current (t = 300 s) DM a T = 25 C 26 A 11 IS Continuous Source Drain Diode Current b, c b, c T = 25 C A 3.2 3.8 I Avalanche Current 12 15 AS L = 0.1 mH E Single Pulse Avalanche Energy 711 mJ AS T = 25 C 16.7 31 C T = 70 C 10.7 20 C P Maximum Power Dissipation W D b, c b, c T = 25 C A 3.7 4.2 b, c b, c T = 70 C A 2.4 2.7 T , T - 55 to 150 Operating Junction and Storage Temperature Range J stg C d, e 260 Soldering Recommendations (Peak Temperature) Notes: a. Package limited. b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAIR is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. Document Number: 67715 For technical questions, contact: pmostechsupport vishay.com www.vishay.com S12-1361-Rev. D, 11-Jun-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 3 mmNew Product SiZ300DT Vishay Siliconix THERMAL RESISTANCE RATINGS Channel-1 Channel-2 Parameter Symbol Typ. Max. Typ. Max. Unit a, b t 10 s R 27 34 24 30 Maximum Junction-to-Ambient thJA C/W R Maximum Junction-to-Case (Drain) Steady State 67.5 3.24 thJC Notes: a. Surface mounted on 1 x 1 FR4 board. b. Maximum under steady state conditions is 69 C/W for channel-1 and 64 C/W for channel-2. SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static V = 0, I = 250 A Ch-1 30 GS D V Drain-Source Breakdown Voltage V DS V = 0 V, I = 250 A Ch-2 30 GS D I = 250 A Ch-1 24 D Temperature Coefficient V /T V DS DS J I = 250 A Ch-2 30 D mV/C I = 250 A Ch-1 - 4.1 D V Temperature Coefficient V /T GS(th) GS(th) J I = 250 A Ch-2 - 5 D V = V , I = 250 A Ch-1 1 2.4 DS GS D V Gate Threshold Voltage V GS(th) V = V , I = 250 A Ch-2 1 2.2 DS GS D Ch-1 100 I V = 0 V, V = 20 V Gate Source Leakage nA GSS DS GS Ch-2 100 V = 30 V, V = 0 V Ch-1 1 DS GS V = 30 V, V = 0 V Ch-2 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 30 V, V = 0 V, T = 55 C Ch-1 5 DS GS J V = 30 V, V = 0 V, T = 55 C Ch-2 5 DS GS J V 5 V, V = 10 V Ch-1 10 DS GS b I A On-State Drain Current D(on) V 5 V, V = 10 V Ch-2 10 DS GS V = 10 V, I = 9.8 A Ch-1 0.0200 0.0240 GS D V = 10 V, I = 15 A Ch-2 0.0090 0.0110 GS D b R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 8.5 A Ch-1 0.0265 0.0320 GS D V = 4.5 V, I = 12 A Ch-2 0.0135 0.0165 GS D V = 15 V, I = 9.8 A Ch-1 30 DS D b g S Forward Transconductance fs V = 15 V, I = 15 A Ch-2 30 DS D a Dynamic Ch-1 400 C Input Capacitance iss Channel-1 Ch-2 730 V = 15 V, V = 0 V, f = 1 MHz DS GS Ch-1 125 C Output Capacitance pF oss Ch-2 155 Channel-2 Ch-1 25 V = 15 V, V = 0 V, f = 1 MHz DS GS C Reverse Transfer Capacitance rss Ch-2 65 V = 15 V, V = 10 V, I = 9.8 A Ch-1 7.4 12 DS GS D V = 15 V, V = 10 V, I = 15 A Ch-2 14.2 22 DS GS D Q Total Gate Charge g Ch-1 3.5 5.3 Channel-1 Ch-2 6.8 11 V = 15 V, V = 4.5 V, I = 9.8 A nC DS GS D Ch-1 1.5 Q Gate-Source Charge gs Ch-2 2.2 Channel-2 Ch-1 1.1 V = 15 V, V = 4.5 V, I = 15 A DS GS D Q Gate-Drain Charge gd Ch-2 2.3 Ch-1 0.5 2.6 5.2 R Gate Resistance f = 1 MHz g Ch-2 0.5 2.6 5.2 Notes: a. Guaranteed by design, not subject to production testing. b. Pulse test pulse width 300 s, duty cycle 2 %. www.vishay.com For technical questions, contact: pmostechsupport vishay.com Document Number: 67715 2 S12-1361-Rev. D, 11-Jun-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000