6.15 mm6.15 mm SQJ260EP www.vishay.com Vishay Siliconix Automotive Dual N-Channel 60 V (D-S) 175 C MOSFETs FEATURESS PowerPAK SO-8L Dual Asymmetric TrenchFET power MOSFET AEC-Q101 qualified D 1 100 % R and UIS tested g Optimized for synchronous buck applications D 2 Material categorization: 1 for definitions of compliance please see S 1 2 www.vishay.com/doc 99912 G 1 3 S 2 4 11 G 2 D D Top View Bottom View 1 2 PRODUCT SUMMARY N-CHANNEL 1 N-CHANNEL 2 V (V) 60 60 DS G G 1 2 R () at V = 10 V 0.0190 0.0085 DS(on) GS R () at V = 4.5 V 0.0240 0.0115 DS(on) GS I (A) 20 54 D Configuration Dual N S S 1 2 Package PowerPAK SO-8L Dual Asymmetric N-Channel 1 MOSFET N-Channel 2 MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) C PARAMETER SYMBOL N-CHANNEL 1 N-CHANNEL 2 UNIT Drain-source voltage V 60 60 DS V Gate-source voltage V 20 GS a T = 25 C 20 54 C Continuous drain current I D T = 125 C 15 31 C a Continuous source current (diode conduction) I 20 44 A S b Pulsed drain current I 60 86 DM Single pulse avalanche current I 18 30 AS L = 0.1 mH Single pulse avalanche energy E 16.2 45 mJ AS T = 25 C 27 48 C b Maximum power dissipation P W D T = 125 C 9 16 C Operating junction and storage temperature range T , T -55 to +175 J stg C d, e Soldering recommendations (peak temperature) 260 THERMAL RESISTANCE RATINGS PARAMETER SYMBOL N-CHANNEL 1 N-CHANNEL 2 UNIT c Junction-to-ambient PCB mount R 85 85 thJA C/W 5.5 3.1 Junction-to-case (drain) R thJC Notes a. Package limited b. Pulse test pulse width 300 s, duty cycle 2 % c. When mounted on 1 square PCB (FR4 material) d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8L is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components S17-0664-Rev. A, 15-May-17 Document Number: 75486 1 For technical questions, contact: automostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 55.13 mm13 mmSQJ260EP www.vishay.com Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) C PARAMETER SYMBOL TEST CONDITIONS MIN.TYP.MAX.UNIT Static V = 0 V, I = 250 A N-Ch 1 60 - - GS D Drain-source breakdown voltage V DS V = 0 V, I = 250 A N-Ch 2 60 - - GS D V V = V , I = 250 A N-Ch 1 1.5 2.0 2.5 DS GS D Gate-source threshold voltage V GS(th) V = V , I = 250 A N-Ch 2 1.5 2.0 2.5 DS GS D N-Ch 1 - - 100 Gate-source leakage I V = 0 V, V = 20 V nA GSS DS GS N-Ch 2 - - 100 V = 0 V V = 60 V N-Ch 1 - - 1 GS DS V = 0 V V = 60 V N-Ch 2 - - 1 GS DS V = 0 V V = 60 V, T = 125 C N-Ch 1 - - 50 GS DS J Zero gate voltage drain current I A DSS V = 0 V V = 60 V, T = 125 C N-Ch 2 - - 50 GS DS J V = 0 V V = 60 V, T = 175 C N-Ch 1 - - 250 GS DS J V = 0 V V = 60 V, T = 175 C N-Ch 2 - - 250 GS DS J V = 10 V V 5 V N-Ch 1 15 - - GS DS a On-state drain current I A D(on) V = 10 V V 5 V N-Ch 2 30 - - GS DS V = 10 V I = 6 A N-Ch 1 - 0.0155 0.0190 GS D V = 10 V I = 10 A N-Ch 2 - 0.0070 0.0085 GS D V = 10 V I = 6 A, T = 125 C N-Ch 1 - - 0.0301 GS D J V = 10 V I = 10 A, T = 125 C N-Ch 2 - - 0.0131 GS D J a Drain-source on-state resistance R DS(on) V = 10 V I = 6 A, T = 175 C N-Ch 1 - - 0.0366 GS D J V = 10 V I = 10 A, T = 175 C N-Ch 2 - - 0.0160 GS D J V = 4.5 V I = 4 A N-Ch 1 - 0.0200 0.0240 GS D V = 4.5 V I = 8 A N-Ch 2 - 0.0094 0.0115 GS D V = 10 V, I = 6 A N-Ch 1 - 26 - DS D b Forward transconductance g S fs V = 10 V, I = 10 A N-Ch 2 - 49 - DS D b Dynamic V = 0 V V = 25 V, f = 1 MHz N-Ch 1 - 805 1100 GS DS Input capacitance C iss V = 0 V V = 25 V, f = 1 MHz N-Ch 2 - 1790 2500 GS DS V = 0 V V = 25 V, f = 1 MHz N-Ch 1 - 355 500 GS DS Output capacitance C pF oss V = 0 V V = 25 V, f = 1 MHz N-Ch 2 - 800 1100 GS DS V = 0 V V = 25 V, f = 1 MHz N-Ch 1 - 13 20 GS DS Reverse transfer capacitance C rss V = 0 V V = 25 V, f = 1 MHz N-Ch 2 - 32 45 GS DS V = 10 V V = 30 V, I = 1.5 A N-Ch 1 - 12 20 GS DS D c Total gate charge Q g V = 10 V V = 30 V, I = 3 A N-Ch 2 - 25 40 GS DS D V = 10 V V = 30 V, I = 1.5 A N-Ch 1 - 2.6 - GS DS D nC c Gate-source charge Q gs V = 10 V V = 30 V, I = 3 A N-Ch 2 - 5.4 - GS DS D V = 10 V V = 30 V, I = 1.5 A N-Ch 1 - 1.5 - GS DS D c Gate-drain charge Q gd V = 10 V V = 30 V, I = 3 A N-Ch 2 - 3 - GS DS D N-Ch 1 0.45 0.92 1.4 Gate resistance R f = 1 MHz g N-Ch 2 0.2 0.46 0.7 S17-0664-Rev. A, 15-May-17 Document Number: 75486 2 For technical questions, contact: automostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000