W25R64JV 3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & RPMC Publication Release Date: October 16, 2018 - Revision B W25R64JV Table of Contents 1. GENERAL DESCRIPTIONS ............................................................................................................. 4 2. FEATURES ....................................................................................................................................... 4 3. PACKAGE TYPES AND PIN CONFIGURATIONS ........................................................................... 5 3.1 Pin Configuration SOIC 208-mil ........................................................................................... 5 3.2 Pin Description SOIC 208-mil ............................................................................................... 5 4. PIN DESCRIPTIONS ........................................................................................................................ 6 4.1 Chip Select (/CS) .................................................................................................................. 6 4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ..................................... 6 4.3 Serial Clock (CLK) ................................................................................................................ 6 4.4 Reset (/RESET) .................................................................................................................... 6 5. BLOCK DIAGRAM ............................................................................................................................ 7 6. FUNCTIONAL DESCRIPTIONS ....................................................................................................... 8 6.1 SPI Operations ..................................................................................................................... 8 6.1.1 Standard SPI Instructions ....................................................................................................... 8 6.1.2 Dual SPI Instructions .............................................................................................................. 8 6.1.3 Quad SPI Instructions ............................................................................................................. 8 6.1.4 Software Reset & Hardware /RESET pin ................................................................................ 8 6.2 RPMC Operations................................................................................................................. 9 6.3 Write Protection .................................................................................................................. 10 6.3.1 Write Protect Features ......................................................................................................... 10 7. STATUS AND CONFIGURATION REGISTERS ............................................................................ 12 7.1 Status Registers ................................................................................................................. 12 7.1.1 Erase/Write In Progress (BUSY) Status Only ................................................................ 12 7.1.2 Write Enable Latch (WEL) Status Only .......................................................................... 12 7.1.3 Block Protect Bits (BP2, BP1, BP0) Volatile/Non-Volatile Writable ................................ 12 7.1.4 Top/Bottom Block Protect (TB) Volatile/Non-Volatile Writable ....................................... 13 7.1.5 Sector/Block Protect Bit (SEC) Volatile/Non-Volatile Writable ....................................... 13 7.1.6 Complement Protect (CMP) Volatile/Non-Volatile Writable ............................................ 13 7.1.7 Status Register Protect (SRL) .............................................................................................. 14 7.1.8 Erase/Program Suspend Status (SUS) Status Only....................................................... 14 7.1.9 Security Register Lock Bits (LB3, LB2, LB1) Volatile/Non-Volatile OTP Writable .......... 15 7.1.10 Quad Enable (QE) Volatile/Non-Volatile Writable ........................................................ 15 7.1.11 Write Protect Selection (WPS) Volatile/Non-Volatile Writable ..................................... 15 7.1.12 Output Driver Strength (DRV1, DRV0) Volatile/Non-Volatile Writable ......................... 16 7.1.13 Reserved Bits Non Functional ...................................................................................... 16 - 1 -