W25X10CLUXIG TR Winbond

W25X10CL 2.5 / 3 / 3.3 V 1M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI Publication Release Date: February 17, 2014 - 1 - Revision G W25X10CL Table of Contents 1. GENERAL DESCRIPTION ......................................................................................................... 4 2. FEATURES ................................................................................................................................. 4 3. PIN CONFIGURATION SOIC 150-MIL ....................................................................................... 5 4. PAD CONFIGURATION USON 2X3-MM ................................................................................... 5 5. PIN DESCRIPTION SOIC AND USON 2X3-MM ........................................................................ 5 5.1 Package Types ............................................................................................................... 6 5.2 Chip Select (/CS) ............................................................................................................ 6 5.3 Serial Data Input, Output and IOs (DI, DO, IO0 and IO1) .............................................. 6 5.4 Write Protect (/WP) ......................................................................................................... 6 5.5 HOLD (/HOLD)................................................................................................................ 6 5.6 Serial Clock (CLK) .......................................................................................................... 6 6. BLOCK DIAGRAM ...................................................................................................................... 7 7. FUNCTIONAL DESCRIPTION.................................................................................................... 8 7.1 SPI OPERATIONS ......................................................................................................... 8 7.1.1 Standard SPI Instructions ................................................................................................. 8 7.1.2 Dual SPI Instructions ........................................................................................................ 8 7.1.3 Hold Function ................................................................................................................... 8 7.2 WRITE PROTECTION .................................................................................................... 9 7.2.1 Write Protect Features ...................................................................................................... 9 8. CONTROL AND STATUS REGISTERS ................................................................................... 10 8.1 STATUS REGISTER .................................................................................................... 10 8.1.1 BUSY .............................................................................................................................. 10 8.1.2 Write Enable Latch (WEL) .............................................................................................. 10 8.1.3 Block Protect Bits (BP1, BP0) ........................................................................................ 10 8.1.4 Top/Bottom Block Protect (TB) ....................................................................................... 10 8.1.5 Reserved Bits ................................................................................................................. 11 8.1.6 Status Register Protect (SRP) ........................................................................................ 11 8.1.7 Status Register Memory Protection ................................................................................ 12 INSTRUCTIONS ....................................................................................................................... 13 8.1.8 Manufacturer and Device Identification .......................................................................... 13 (1) 8.1.9 Instruction Set ............................................................................................................. 14 8.1.10 Write Enable (06h) ........................................................................................................ 15 8.1.11 Write Enable for Volatile Status Register (50h) ............................................................ 15 8.1.12 Write Disable (04h) ....................................................................................................... 16 8.1.13 Read Status Register (05h) .......................................................................................... 16 8.1.14 Write Status Register (01h) .......................................................................................... 17 8.1.15 Read Data (03h) ........................................................................................................... 18 8.1.16 Fast Read (0Bh) ........................................................................................................... 19 8.1.17 Fast Read Dual Output (3Bh) ....................................................................................... 20 8.1.18 Fast Read Dual I/O (BBh) ............................................................................................. 21 8.1.19 Continuous Read Mode Bits (M7-0) ............................................................................. 23 8.1.20 Continuous Read Mode Reset (FFFFh) ....................................................................... 23 8.1.21 Page Program (02h) ..................................................................................................... 24 8.1.22 Sector Erase (20h) ....................................................................................................... 25 Publication Release Date: February 17, 2014 - 2 - Revision G