W9464G6KH 1M 4 BANKS 16 BITS DDR SDRAM Table of Contents- 1. GENERAL DESCRIPTION ......................................................................................................... 4 2. FEATURES ................................................................................................................................. 4 3. ORDER INFORMATION ............................................................................................................. 4 4. KEY PARAMETERS ................................................................................................................... 5 5. PIN CONFIGURATION ............................................................................................................... 6 6. PIN DESCRIPTION ..................................................................................................................... 7 7. BLOCK DIAGRAM ...................................................................................................................... 8 8. FUNCTIONAL DESCRIPTION.................................................................................................... 9 8.1 Power Up Sequence ....................................................................................................... 9 8.2 Command Function ...................................................................................................... 10 8.2.1 Bank Activate Command ........................................................................... 10 8.2.2 Bank Precharge Command ........................................................................ 10 8.2.3 Precharge All Command ............................................................................ 10 8.2.4 Write Command ......................................................................................... 10 8.2.5 Write with Auto-precharge Command ........................................................ 10 8.2.6 Read Command ......................................................................................... 10 8.2.7 Read with Auto-precharge Command ....................................................... 10 8.2.8 Mode Register Set Command.................................................................... 11 8.2.9 Extended Mode Register Set Command ................................................... 11 8.2.10 No-Operation Command ............................................................................ 11 8.2.11 Burst Read Stop Command ....................................................................... 11 8.2.12 Device Deselect Command ....................................................................... 11 8.2.13 Auto Refresh Command ............................................................................ 11 8.2.14 Self Refresh Entry Command .................................................................... 12 8.2.15 Self Refresh Exit Command ....................................................................... 12 8.2.16 Data Write Enable /Disable Command ...................................................... 12 8.3 Read Operation............................................................................................................. 12 8.4 Write Operation ............................................................................................................. 13 8.5 Precharge ..................................................................................................................... 13 8.6 Burst Termination ......................................................................................................... 13 8.7 Refresh Operation ........................................................................................................ 13 8.8 Power Down Mode ....................................................................................................... 14 8.9 Input Clock Frequency Change during Precharge Power Down Mode ........................ 14 8.10 Mode Register Operation .............................................................................................. 14 8.10.1 Burst Length field (A2 to A0) ...................................................................... 14 8.10.2 Addressing Mode Select (A3) .................................................................... 15 8.10.3 CAS Latency field (A6 to A4) ..................................................................... 16 8.10.4 DLL Reset bit (A8) ..................................................................................... 16 8.10.5 Mode Register /Extended Mode register change bits (BA0, BA1)............. 16 Publication Release Date: Nov. 14, 2014 Revision: A02 - 1 - W9464G6KH 8.10.6 Extended Mode Register field .................................................................... 16 8.10.7 Reserved field ............................................................................................ 16 9. OPERATION MODE ................................................................................................................. 17 9.1 Simplified Truth Table ................................................................................................... 17 9.2 Function Truth Table ..................................................................................................... 18 9.3 Function Truth Table for CKE ....................................................................................... 21 9.4 Simplified Stated Diagram ............................................................................................ 22 10. ELECTRICAL CHARACTERISTICS ......................................................................................... 23 10.1 Absolute Maximum Ratings .......................................................................................... 23 10.2 Recommended DC Operating Conditions .................................................................... 23 10.3 Capacitance .................................................................................................................. 24 10.4 Leakage and Output Buffer Characteristics .................................................................. 24 10.5 DC Characteristics ........................................................................................................ 25 10.6 AC Characteristics and Operating Condition ................................................................ 26 10.7 AC Test Conditions ....................................................................................................... 27 11. SYSTEM CHARACTERISTICS FOR DDR SDRAM ................................................................. 29 11.1 Table 1: Input Slew Rate for DQ, DQS, and DM .......................................................... 29 11.2 Table 2: Input Setup & Hold Time Derating for Slew Rate ........................................... 29 11.3 Table 3: Input/Output Setup & Hold Time Derating for Slew Rate ............................... 29 11.4 Table 4: Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate ................ 29 11.5 Table 5: Output Slew Rate Characteristics (x16 Devices only) .................................... 29 11.6 Table 6: Output Slew Rate Matching Ratio Characteristics ......................................... 30 11.7 Table 7: AC Overshoot/Undershoot Specification for Address and Control Pins ......... 30 11.8 Table 8: Overshoot/Undershoot Specification for Data, Strobe, and Mask Pins .......... 31 11.9 System Notes:............................................................................................................... 32 12. TIMING WAVEFORMS ............................................................................................................. 34 12.1 Command Input Timing ................................................................................................ 34 12.2 Timing of the CLK Signals ............................................................................................ 34 12.3 Read Timing (Burst Length = 4) ................................................................................... 35 12.4 Write Timing (Burst Length = 4) .................................................................................... 36 12.5 DM, DATA MASK (W9464G6KH) ................................................................................. 37 12.6 Mode Register Set (MRS) Timing ................................................................................. 38 12.7 Extend Mode Register Set (EMRS) Timing .................................................................. 39 12.8 Auto-precharge Timing (Read Cycle, CL = 2) .............................................................. 40 12.9 Auto-precharge Timing (Read cycle, CL = 2), continued ............................................. 41 12.10 Auto-precharge Timing (Write Cycle) .......................................................................... 42 12.11 Read Interrupted by Read (CL = 2, BL = 2, 4, 8) ........................................................ 43 12.12 Burst Read Stop (BL = 8) ............................................................................................ 43 12.13 Read Interrupted by Write & BST (BL = 8) .................................................................. 44 12.14 Read Interrupted by Precharge (BL = 8) ..................................................................... 44 12.15 Write Interrupted by Write (BL = 2, 4, 8) ..................................................................... 45 12.16 Write Interrupted by Read (CL = 2, BL = 8) ................................................................ 45 12.17 Write Interrupted by Read (CL = 3, BL = 4) ................................................................ 46 12.18 Write Interrupted by Precharge (BL = 8) ..................................................................... 46 12.19 2 Bank Interleave Read Operation (CL = 2, BL = 2) ................................................... 47 Publication Release Date: Nov. 14, 2014 Revision: A02 - 2 -