AS4C16M32SC-7TIN AS4C32M16SC-7TIN AS4C64M8SC-7TIN Revision History 512M SDRAM 54/86pin TSOP II Package Revision Details Date Rev 1.0 Preliminary datasheet Sep. 2018 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 24 - Rev.1.0 Sep. 2018AS4C16M32SC-7TIN AS4C32M16SC-7TIN AS4C64M8SC-7TIN 1 Overview This chapter gives an overview of the 512-Mbit Synchronous DRAM component product and describes its main characteristics. 1.1 Features Fully Synchronous to Positive Clock Edge Fast clock rate: 133 MHz Multiple Burst Read with Single Write Operation Four Banks controlled by BA0 & BA1 Data Mask for Byte Control (x16,x32) Programmable Mode registers - CAS Latency: 1 or 2 or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential or Interleaved Automatic and Controlled Precharge Command Auto Refresh and Self Refresh 8192 refresh cycles/64ms(7.8 s) T 85C Power down mode Data Mask for Read / Write control (x8, x16, x32) Random Column Address every CLK (1-N Rule) Single +3.3V0.3V power supply Operating Temperature Range: - Industrial: T = -40~85C A Interface: LVTTL Available in 86/54 Pin 400 mil plastic TSOP II package,TSOPII54 (x8, x16) TSOPII86 (x32) - Pb free and Halogen free Table 1. Key Specifications Speed Code -7 Unit System Frequency (fCK) 133 MHz t Max. Clock Frequency CL3 7.5 ns CK3 t 5.4 ns AC3 t CL2 10 ns CK2 t 6 ns AC2 t CL1 20 ns CK1 t 17 ns AC1 Table 2. Ordering Information Package Temperature Temp Range Frequency Part Number AS4C16M32SC-7TIN 133MHz Industrial -40C to 85C 86 Pin TSOP II AS4C32M16SC-7TIN 133MHz 54 Pin TSOP II Industrial -40C to 85C AS4C64M8SC-7TIN 133MHz 54 Pin TSOP II Industrial -40C to 85C Confidential - 2 of 24 - Rev.1.0 Sep. 2018