8Mx16 DDR1-AS4C8M16D1A Revision History AS4C8M16D1A - 66-pin TSOPII PACKAGE Revision Details Date Rev 1.1 Preliminary datasheet July 2015 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1/66 - Rev.1.1 July 20158Mx16 DDR1-AS4C8M16D1A Overview Features The 128Mb DDR AS4C8M16D1 SDRAM is a high-speed CMOS double data rate Fast clock rate: 200MHz synchronous DRAM containing 128 Mbits. It is Operating temperature: internally configured as a quad 2M x 16 DRAM - Commercial (0~70 C) with a synchronous interface (all signals are registered on the positive edge of the clock - Industrial (-40~85 C) signal, CK). Data outputs occur at both rising Differential Clock CK & input CK edges of CK and CK. Bi-directional DQS Read and write accesses to the SDRAM are DLL enable/disable by EMRS burst oriented accesses start at a selected location and continue for a programmed Fully synchronous operation number of locations in a programmed Internal pipeline architecture sequence. Accesses begin with the registration Four internal banks, 2M x 16-bit for each bank of a BankActivate command which is then Programmable Mode and Extended Mode registers followed by a Read or Write command. The - CAS Latency: 2, 2.5, 3 DDR SDRAM provides programmable Read or Write burst lengths of 2, 4, or 8. An auto - Burst length: 2, 4, 8 precharge function may be enabled to provide - Burst Type: Sequential & Interleaved a self-timed row precharge that is initiated at Individual byte write mask control the end of the burst sequence. The refresh DM Write Latency = 0 functions, either Auto or Self Refresh are easy Auto Refresh and Self Refresh to use. In addition, The DDR SDRAM features 4096 refresh cycles / 64ms programmable DLL option. By having a programmable mode register and extended Precharge & active power down mode register, the system can choose the Power supplies: VDD & VDDQ = 2.5V 0.2V most suitable modes to maximize its Interface: SSTL 2 I/O Interface performance. These devices are well suited for Package: 66 Pin TSOP II, 0.65mm pin pitch applications requiring high memory bandwidth and high performance. - Pb free and Halogen free Table 1. Ordering Information Clock Temperature Data Rate Product part No Package AS4C8M16D1A-5TCN 400Mbps/pin 66pin TSOPII 200MHz Commercial 0C to 70C AS4C 8M16D 1A-5TIN 200MHz Industrial -40C to 85C 400Mbps/pin 66pin TSOPII Confidential - 2/66 - Rev.1.1 July 2015