16-Bit, Isolated Sigma-Delta Modulator, LVDS Interface Data Sheet AD7405 FEATURES FUNCTIONAL BLOCK DIAGRAM V V DD1 DD2 5 MHz to 20 MHz external clock input rate 16 bits, no missing codes AD7405 Signal-to-noise ratio (SNR): 88 dB typical MCLKIN+ Effective number of bits (ENOB): 14.2 bits typical (5MHz TO CLK CLK 20MHz) DECODER ENCODER Typical offset drift vs. temperature: 1.6 V/C MCLKIN REF Low voltage differential signaling (LVDS) interface On-board digital isolator V IN+ MDAT+ - ADC On-board reference V DATA DATA IN Full-scale analog input voltage range: 320 mV ENCODER DECODER MDAT 40C to + 125C operating temperature range High common-mode transient immunity: >25 kV/s 16-lead, wide-body SOIC IC, with increased creepage GND GND 1 2 package Figure 1. Safety and regulatory approvals UL recognition 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A VDE Certificate of Conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Maximum working insulation voltage (V ): 1250 V IORM PEAK APPLICATIONS Shunt current monitoring AC motor controls Power and solar inverters Wind turbine inverters Data acquisition systems Analog-to-digital and opto-isolator replacements GENERAL DESCRIPTION 1 The AD7405 is a high performance, second-order, - modulator can be reconstructed with an appropriate digital filter to achieve that converts an analog input signal into a high speed, single-bit 88 dB SNR at 78.1 kSPS. The LVDS input/output can use a 3 V LVDS data stream, with on-chip digital isolation based on to 5.5 V supply (VDD2). Analog Devices, Inc., iCoupler technology. The AD7405 operates The LVDS interface is digitally isolated. The LVDS interface from a 4.5 V to 5.5 V (V ) power supply and accepts a DD1 technology, combined with monolithic transformer technology, differential input signal of 250 mV (320 mV full-scale). The means the on-chip isolation provides outstanding performance differential input is ideally suited to shunt voltage monitoring in characteristics, superior to alternatives such as optocoupler high voltage applications where galvanic isolation is required. devices. The AD7405 device is offered in a 16-lead, wide-body The analog input is continuously sampled by a high performance SOIC IC package and has an operating temperature range of analog modulator, and converted to a ones density digital output 40C to +125C. stream with a data rate of up to 20 MHz. The original information 1 Protected by U.S. Patents 5,952,849 6,873,065 and 7,075,329. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com BUF 12536-001AD7405 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Terminology .................................................................................... 12 Applications ....................................................................................... 1 Theory of Operation ...................................................................... 13 Functional Block Diagram .............................................................. 1 Circuit Information .................................................................... 13 General Description ......................................................................... 1 Analog Input ............................................................................... 13 Revision History ............................................................................... 2 Differential Inputs ...................................................................... 14 Specif icat ions ..................................................................................... 3 Low Voltage Differential Signaling (LVDS) Interface ........... 14 Timing Specifications .................................................................. 4 Applications Information .............................................................. 15 Package Characteristics ............................................................... 5 Current Sensing Applications ................................................... 15 Insulation and Safety Related Specifications ............................ 5 Voltage Sensing Applications .................................................... 15 Regulatory Information ............................................................... 5 Input Filter .................................................................................. 16 DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Insulation Digital Filter ................................................................................ 16 Characteristics .............................................................................. 6 Grounding and Layout .............................................................. 19 Absolute Maximum Ratings ............................................................ 7 Insulation Lifetime ..................................................................... 19 ESD Caution .................................................................................. 7 Outline Dimensions ....................................................................... 20 Pin Configuration and Function Descriptions ............................. 8 Ordering Guide .......................................................................... 20 Typical Performance Characteristics ............................................. 9 REVISION HISTORY 11/14Rev. 0 to Rev. A Change to Figure 1 ........................................................................... 1 Changes to Table 7 ............................................................................ 7 Changes to Ordering Guide .......................................................... 20 9/14Revision 0: Initial Version Rev. A Page 2 of 20