MAX1449 19-4802 Rev 2 9/04 10-Bit, 105Msps, Single 3.3V, Low-Power ADC with Internal Reference General Description Features The MAX1449 3.3V, 10-bit analog-to-digital converter Single 3.3V Operation (ADC) features a fully differential input, a pipelined 10- Excellent Dynamic Performance stage ADC architecture with wideband track-and-hold 58.5dB SNR at f = 20MHz (T/H), and digital error correction incorporating a fully dif- IN ferential signal path. The ADC is optimized for low- 72dBc SFDR at f = 20MHz IN power, high-dynamic performance in imaging and digital Low Power communications applications. The converter operates 62mA (Normal Operation) from a single 2.7V to 3.6V supply, consuming only 5A (Shutdown Mode) 186mW while delivering a 58.5dB (typ) signal-to-noise ratio (SNR) at a 20MHz input frequency. The fully differ- Fully Differential Analog Input ential input stage has a -3dB 400MHz bandwidth and Wide 2Vp-p Differential Input Voltage Range may be operated with single-ended inputs. In addition to low operating power, the MAX1449 features a 5A 400MHz -3dB Input Bandwidth power-down mode for idle periods. On-Chip 2.048V Precision Bandgap Reference An internal 2.048V precision bandgap reference is CMOS-Compatible Three-State Outputs used to set the ADCs full-scale range. A flexible refer- ence structure allows the user to supply a buffered, 32-Pin TQFP Package direct, or externally derived reference for applications Evaluation Kit Available (MAX1448 EV Kit) requiring increased accuracy or a different input volt- age range. Ordering Information Lower speed, pin-compatible versions of the MAX1449 are also available. Refer to the MAX1444 data sheet for PART TEMP RANGE PIN-PACKAGE a 40Msps version, the MAX1446 data sheet for a MAX1449EHJ -40C to +85C 32 TQFP 60Msps version, and the MAX1448 data sheet for 80Msps. The MAX1449 has parallel, offset binary, CMOS-com- Pin-Compatible, Lower Speed patible, three-state outputs that can be operated from 1.7V to 3.6V to allow flexible interfacing. The device is Selection Table available in a 5mm x 5mm 32-pin TQFP package and is PART SAMPLING SPEED (Msps) specified over the extended industrial (-40C to +85C) temperature range. MAX1444 40 MAX1446 60 MAX1448 80 Applications Ultrasound Imaging Functional Diagram CCD Imaging Baseband and IF Digitization CLK V DD MAX1449 Digital Set-Top Boxes CONTROL GND Video Digitizing Applications 10 D IN+ OUTPUT E D9D0 T/H PIPELINE ADC DRIVERS IN- C OV DD REF SYSTEM + PD REF BIAS OGND Pin Configuration appears at end of data sheet. REFOUT REFIN REFP COM REFN OE Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. EVALUATION KIT AVAILABLE10-Bit, 105Msps, Single 3.3V, Low-Power ADC with Internal Reference ABSOLUTE MAXIMUM RATINGS V , OV to GND ...............................................-0.3V to +3.6V Continuous Power Dissipation (T = +70C) DD DD A OGND to GND.......................................................-0.3V to +0.3V 32-Pin TQFP (derate 18.7mW/C above +70C).....1495.3mW IN+, IN- to GND........................................................-0.3V to V Operating Temperature Range ...........................-40C to +85C DD REFIN, REFOUT, REFP, Junction Temperature......................................................+150C REFN, and COM to GND........................-0.3V to (V + 0.3V) Storage Temperature Range ............................-60C to +150C DD OE, PD, CLK to GND..................................-0.3V to (V + 0.3V) Lead Temperature (soldering, 10s) .................................+300C DD D9D0 to GND.........................................-0.3V to (OV + 0.3V) DD Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V = 3.3V, OV = 2V, 0.1F and 1F capacitors from REFP, REFN, and COM to GND, V = 2.048V, REFOUT connected to DD DD REFIN REFIN through a 10k resistor, V = 2V (differential with respect to COM), C = 10pF at digital outputs, f = 105MHz, T = T IN P-P L CLK A MIN to T , unless otherwise noted. +25C guaranteed by production test, < +25C guaranteed by design and characterization typical MAX values are at T = +25C.) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC ACCURACY Resolution 10 Bits Integral Nonlinearity INL f = 7.5MHz, T +25C 0.75 2.4 LSB IN A f = 7.5MHz, no missing codes IN Differential Nonlinearity DNL 0.5 1.0 LSB guaranteed, T +25C A Offset Error < 1 1.7 % FS Gain Error T +25C, T +25C 0 2 % FS A A ANALOG INPUT Input Differential Range V Differential or single-ended inputs 1.0 V DIFF Common-Mode V /2 DD V V COM Voltage Range 0.5 Input Resistance R Switched capacitor load 20 k IN Input Capacitance C 5pF IN CONVERSION RATE Maximum Clock Frequency f 105 MHz CLK Data Latency 5.5 Cycles DYNAMIC CHARACTERISTICS (f = 105.26MHz, 4096-point FFT) CLK f = 7.5MHz 55.9 58.5 IN Signal-to-Noise Ratio SNR f = 20MHz 55.5 58.5 dB IN (Note 1) f = 50MHz 58 IN f = 7.5MHz 55.3 58.2 IN Signal-to-Noise + Distortion (Up SINAD f = 20MHz 54.5 58.1 dB IN to 5th Harmonic) (Note 1) f = 50MHz 57.6 IN f = 7.5MHz 62 72 IN Spurious-Free Dynamic SFDR f = 20MHz 61 72 dBc IN Range (Note 1) f = 50MHz 70 IN 2 MAX1449