MAX3873A 19-2577 Rev 2 5/07 Low-Power, Compact 2.5Gbps/2.7Gbps Clock-Recovery and Data-Retiming IC General Description Features The MAX3873A is a compact, low-power 2.488Gbps/ Fully Integrated Clock Recovery and Data 2.67Gbps clock-recovery and data-retiming IC for Retiming SDH/SONET applications. The phase-locked loop (PLL) Power Dissipation: 260mW with +3.3V Supply recovers a synchronous clock signal from the serial NRZ Clock Jitter Generation: 5mUI RMS data input. The input data is then retimed by this recov- ered clock, providing a clean data output. The MAX3873A Exceeds ANSI, ITU, and Bellcore SDH/SONET meets all SDH/SONET jitter specifications, does not Jitter Specifications require an external reference clock to aid in frequency Differential Input Range: 50mV to 1.6V P-P P-P acquisition, and provides excellent tolerance to both Single +3.3V Power Supply deterministic and sinusoidal jitter. The MAX3873A pro- vides a PLL loss-of-lock (LOL) output to indicate whether PLL Fast Track (FASTRACK) Mode Available the CDR is in lock. The recovered data and clock outputs Clock Output Can Be Disabled are CML with on-chip 50 back terminations on each line. Input Data Rate: 2.488Gbps or 2.67Gbps The clock output can be powered down if not used. Selectable Output Amplitude The MAX3873A is implemented in Maxims second-gener- Tolerates 2000 Consecutive Identical Digits ation SiGe process and consumes only 260mW at 3.3V supply (output clock disabled, low output swing). The Loss-of-Lock Indicator device is available in a 4mm x 4mm 20-pin QFN Differential CML Data and Clock Outputs exposed-pad package and operates from -40C to +85C. Operating Temperature Range: -40C to +85C Applications Ordering Information Switch Matrix Backplanes SDH/SONET Receivers and Regenerators PIN- PKG PART TEMP RANGE PACKAGE CODE Add/Drop Multiplexers Digital Cross-Connects 20 QFN MAX3873AEGP -40C to +85C G2044-3 (4mm x 4mm) SDH/SONET Test Equipment 20 TQFN DWDM Transmission Systems M AX 3873AETP + -40C to +85C T2044-3 (4mm x 4mm) + Denotes lead-free package. Pin Configuration TOP VIEW RATESET 1 15 SDO+ Typical Application Circuit appears at end of data sheet. V 2 14 SDO- CC SDI+ 3 13 VCC BUF MAX3873A SDI- 4 12 SCLKO+ V 5 11 SCLKO- CC QFN/TQFN** **NOTE: THE EXPOSED PAD MUST BE SOLDERED TO THE SUPPLY GROUND. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. EVALUATION KIT AVAILABLE V 6 20 GND CC FASTRACK 7 19 FIL+ VCC VCO 8 18 FIL- MODE 9 17 GND SCLKEN 10 16 LOLLow-Power, Compact 2.5Gbps or 2.7Gbps Clock-Recovery and Data-Retiming IC ABSOLUTE MAXIMUM RATINGS Supply Voltage, V ..............................................-0.5V to +5.0V Operating Temperature Range ...........................-40C to +85C CC Voltage at SDI .............................. (V - 1.0V) to (V + 0.5V) Storage Temperature Range .............................-50C to +150C CC CC CML Output Current at SDO, SCLKO ............................22mA Processing Temperature..................................................+400C Voltage at LOL, FASTRACK, FIL, SCLKEN Lead Temperature (soldering, 10s) .................................+300C MODE, RATESET...................................-0.5V to (V + 0.5V) CC Continuous Power Dissipation (T = +85C) A 20-Lead QFN (derate 20.0mW/C above +85C) .....1300mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (V = 3.0V to 3.6V, T = -40C to +85C. Typical values are at 2.488Gbps, V = 3.3V, T = +25C, unless otherwise noted.) (Note 1) CC A CC A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS MODE = GND, SCLKEN = low 79 99 Supply Current (Note 2) I mA CC MODE = OPEN, SCLKEN = high 112 142 CML INPUT SPECIFICATIONS (SDI+, SDI-) Differential Input Voltage V Figure 1 50 1600 mV ID P-P Single-Ended Input V Figure 1 V - 0.8 V + 0.4 V IS CC CC Voltage Input Common-Mode DC-coupled, Figure 1 V - V /4 V CC ID Voltage Input Termination to V R 40 50 60 CC IN CML OUTPUT SPECIFICATIONS (SDO+, SDO-, SCLKO+, SCLKO-) MODE = open 640 800 1000 Differential Output Swing MODE = V 400 600 800 mV CC P-P (Note 3) MODE = GND 200 400 600 Differential Output R 80 100 120 O Resistance MODE = Open V - 0.17 CC Output Common-Mode MODE = V V - 0.13 V CC CC Voltage (Note 3) MODE = GND V - 0.08 CC TTL INPUT/OUTPUT SPECIFICATIONS (FASTRACK, LOL, SCLKEN, MODE, RATESET) Input High Voltage V 2.0 V IH Input Low Voltage V 0.8 V IL Input Current -30 +30 A Output High Voltage V I = sourcing 40A 2.4 V OH OH Output Low Voltage V I = sinking 2mA 0.4 V OL OL 2 MAX3873A