PI6LC48L0201 2-Output LVDS Networking Clock Generator Features Description Two differential LVDS output pairs e PTh I6LC48L0201 is a 2-output LVDS synthesizer optimized to generate Ethernet reference clock frequencies and is a member Selectable crystal oscillator interface or LVCMOS/LVTTL of Pericoms HiFlex family of high performance clock solutions. single-ended clock input Using a 25MHz crystal, the most popular Ethernet frequencies Supports the following output frequencies: 62.5MHz, can be generated based on the settings of 2 frequency select pins. 125MHz, 156.25MHz e PTh I6LC48L0201 uses Pericoms proprietary low phase noise RMS phase jitter 156.25MHz, using a 25MHz crystal PLL technology to achieve ultra low phase jitter, so it is ideal for (1.875MHz 20MHz): 0.2ps (typical) Ethernet interface in all kind of systems. RMS phase jitter 156.25MHz, using a 25MHz crystal (12kHz 20MHz): 0.32ps (typical) Full 3.3V or 2.5V supply modes Commercial and industrial ambient operating temperature Available in lead-free package: 20-TSSOP Applications Networking systems Block Diagram XTAL IN OSC PFD VCO XTAL OUT CLK0 /N CLK0 Ref IN CLK1 M CLK1 IN SEL PLL ByPass N SEL 0:1 M reset www.pericom.com PI6LC48L0201 Rev. A 07/23/2013 13-0115 1PI6LC48L0201 2-Output LVDS Networking Clock Generator Pin Configuration NC 1 20 VDDO VDDO 2 19 CLK1 CLK0 3 18 CLK1 CLK0 4 17 GND M reset 16 NC 5 PLL ByPass 6 15 IN SEL Ref IN NC 7 14 13 XTAL IN VDDA 8 12 XTAL OUT N SEL0 9 11 VDD 10 N SEL1 Pinout Table Pin No. Pin Name I/O Type Description 1, 7, 16 NC No connection 2, 20 VDDO Power - Output Power Supply 3,4 CLK0, CLK0 Output - LVDS Output clock 0 Master reset. 1, CLK0CLK1 go to low, CLK0 /CLK1 go to 5 M reset Input Pull-down high 0 outputs are enabled 6 PLL ByPass Input Pull-down PLL bypass select. 0 PLL is enabled, 1 PLL is bypassed 8 VDDA Power - Analog Power Supply 9, 11 N SEL0, N SEL1 Input Pull-down Output frequency select 10 VDD Power - Core Power Supply XTAL OUT, 12, 13 Crystal - Crystal input and output XTAL IN 14 Ref IN Input Pull-down CMOS reference clock input 15 IN SEL Input Pull-down 0 selects Crystal, 1 selects reference input 17 GND Ground - Ground CLK1 , 18, 19 Output - LVDS Output clock 1 CLK1 www.pericom.com PI6LC48L0201 Rev. A 07/23/2013 13-0115 2