CY25100 Field and Factory Programmable Spread Spectrum Clock Generator for EMI Reduction Field and Factory Programmable Spread Spectrum Clock Generator for EMI Reduction Features Functional Description Wide Operating Output (SSCLK) Frequency Range The CY25100 is a Spread Spectrum Clock Generator (SSCG) IC used to reduce EMI found in todays high speed digital electronic 3 MHz to 200 MHz systems. Programmable Spread Spectrum with nominal 31.5 kHz The device uses a Cypress proprietary PLL and Spread Modulation Frequency Spectrum Clock (SSC) technology to synthesize and modulate Center Spread: 0.25% to 2.5% the frequency of the input clock. By frequency modulating the Down Spread: 0.5% to 5.0% clock, the measured EMI at the fundamental and harmonic frequencies are greatly reduced. This reduction in radiated Input frequency range energy can significantly reduce the cost of complying with External Crystal: 8 to 30 MHz Fundamental Crystals regulatory agency (EMC) requirements and improve External Reference: 8 to 166 MHz Clock time-to-market without degrading system performance. Integrated Phase-Locked Loop (PLL) The CY25100 uses a factory or field-programmable configuration memory array to synthesize output frequency, Field Programmable devices available spread percentage, crystal load capacitor, reference clock output Programmable Crystal Load Capacitor Tuning Array on/off, spread spectrum on/off function, and PD /OE options. Low Cycle-to-cycle Jitter The spread percentage is programmed to either center spread or down spread with various spread percentages. The range for Spread Spectrum on/off function center spread is from 0.25% to 2.50%. The range for down spread is from 0.5% to 5.0%. Powerdown or Output Enable function The input to the CY25100 can either be a crystal or a clock Commercial and Industrial temperature ranges signal. The CY25100 has two clock outputs: REFCLK and 3.3 V operation SSCLK. The non-spread spectrum REFCLK output has the same frequency as the input of the CY25100. 8-pin TSSOP and SOIC packages For a complete list of related documentation, click here. Logic Block Diagram RFB PLL with 3 MODULATION CONTROL XIN CXIN 6 OUTPUT 2 PROGRAMMABLE CONFIGURATION DIVIDERS REFCLK and XOUT CXOUT MUX 7 4 SSCLK PD or OE 8 SSON 1 5 VDD VSS Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-07499 Rev. *K Revised November 28, 2014CY25100 Contents Pinouts ..............................................................................3 DC Electrical Characteristics .......................................... 6 Pin Description .................................................................3 AC Electrical Characteristics .......................................... 7 Programming Description ...............................................4 Application Circuit ............................................................ 8 Field Programmable CY25100 ..................................4 Switching Waveforms ...................................................... 9 CyberClocks Online Software ...................................4 Informational Graphs ..................................................... 10 CY3672 Programmer and Ordering Information ...................................................... 12 CY3690/CY3691 Socket Adapters .....................................4 Possible Configurations ............................................. 12 Factory Programmable CY25100 ................................4 Ordering Code Definitions ......................................... 13 Product Functions ............................................................4 Package Diagrams .......................................................... 13 Input Frequency (XIN, Pin 3 and XOUT, Pin 2) ...........4 Acronyms ........................................................................15 CXIN and CXOUT (Pin 3 and Pin 2) ...........................4 Document Conventions ................................................. 15 Output Frequency (SSCLK, Pin 7) ..............................4 Units of Measure ....................................................... 15 Spread Percentage (SSCLK, Pin 7) ............................4 Document History Page ................................................. 16 Reference Output (REFOUT, Pin 6) ............................4 Sales, Solutions, and Legal Information ...................... 18 Modulation Frequency .................................................4 Worldwide Sales and Design Support ....................... 18 Power Down or Output Enable (PD or OE, Pin 4) .....4 Products ....................................................................18 Absolute Maximum Rating ..............................................5 PSoC Solutions ...................................................... 18 Recommended Crystal Specifications ...........................5 Cypress Developer Community ................................. 18 Operating Conditions .......................................................5 Technical Support ..................................................... 18 Document Number: 38-07499 Rev. *K Page 2 of 18