CY2510 CY2509 CY2509/10 Spread Aware, Ten/Eleven Output Zero Delay Buffer Spread Aware, Ten/Eleven Output Zero Delay Buffer Features Key Specifications Spread Aware designed to work with spread spectrum Operating voltage: .............................................3.3 V 10% frequency timing generator (SSFTG) reference signals Operating range: ..........................40 MHz < f < 140 MHz OUT Well suited to both 100- and 133-MHz designs Cycle-to-cycle jitter: ..................................................<100 ps Ten (CY2509) or eleven (CY2510) low-voltage complementary Output to output skew: ..............................................<100 ps metal oxide semiconductor (LVCMOS) / low-voltage transistor- transistor logic (LVTTL) outputs. Phase error jitter: .......................................................<100 ps For a complete list of related documentation, click here. 50 ps typical peak cycle-to-cycle jitter Single output enable pin for CY2510 version, dual pins on CY2509 devices allow shutting down a portion of the outputs 3.3 V power supply On-chip 25 damping resistors Available in 24-pin thin shrunk small outline package (TSSOP) package Improved tracking skew, but narrower frequency support limit when compared to W132-09B/10B Logic Block Diagram AGND 1 24 VDD 2 23 FBIN PLL FBOUT Q0 3 22 CLK Q1 4 21 Q0 Q2 5 20 Q1 GND 6 19 Q2 GND 7 18 OE0:4 Q3 8 17 Q3 Q4 9 16 Q4 OE VDD 10 15 Q5 OE 11 14 Q6 FBOUT 12 13 OE5:8 Q7 Q8 AGND 1 24 Q9 VDD 2 23 Q0 3 22 Configuration of these blocks dependent upon specific option being used Q1 4 21 Q2 5 20 GND 6 19 GND 7 18 Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-07230 Rev. *G Revised November 28, 2014 CY2509/10 Contents Pin Configurations ...........................................................3 Package Diagram .............................................................. 9 Pin Definitions ..................................................................4 Acronyms ........................................................................10 Functional Overview ........................................................4 Document Conventions ................................................. 10 Spread Aware ..........................................................5 Units of Measure ....................................................... 10 How to Implement Zero Delay .....................................5 Document History Page ................................................. 11 Inserting Other Devices in Feedback Path ..................5 Sales, Solutions, and Legal Information ...................... 12 Absolute Maximum Ratings ............................................6 Worldwide Sales and Design Support ....................... 12 DC Electrical Characteristics ..........................................6 Products ....................................................................12 AC Electrical Characteristics ..........................................7 PSoC Solutions ...................................................... 12 Ordering Information ........................................................8 Cypress Developer Community ................................. 12 Ordering Code Definitions ...........................................8 Technical Support ..................................................... 12 Document Number: 38-07230 Rev. *G Page 2 of 12