CY7C09289V-9AXI

CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16K / 32K / 64K 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16K / 32K / 64K 16 / 18 Synchronous Dual-Port Static RAM Active = 115 mA (typical) Features Standby = 10 A (typical) True dual-ported memory cells that allow simultaneous access Fully synchronous interface for easier operation of the same memory location Burst counters increment addresses internally: Six flow through/pipelined devices: Shorten cycle times 16K 16 / 18 organization (CY7C09269V/369V) Minimize bus noise 32K 16 organization (CY7C09279V) Supported in flow through and pipelined modes 64K 16 / 18 organization (CY7C09289V/389V) Dual chip enables easy depth expansion Three modes: Upper and lower byte controls for bus matching Flow through Pipelined Automatic power down Burst Commercial and industrial temperature ranges Pipelined output mode on both ports allows fast 100 MHz operation Pb-free 100-pin TQFP package available 0.35 micron CMOS for optimum speed and power Functional Description 1 High speed clock to data access: 7.5 , 9, 12 ns (max) For a complete list of related documentation, click here. 3.3 V low operating power: Logic Block Diagram R/W R/W L R UB UB L R CE CE 0L 1 1 0R CE CE 1L 1R 0 0 0/1 0/1 LB LB L R OE OE L R 1b 0b 1a 0a 0a 1a 0b 1b 0/1ba a b 0/1 FT/Pipe FT/Pipe L R 8/9 8/9 2 2 I/O I/O I/O I/O 8/9L 15/17L 8/9R 15/17R I/O I/O Control Control 3 8/9 8/9 3 I/O I/O I/O I/O 0L 7/8L 0R 7/8R 14/15/16 14/15/16 4 4 A A A A 0L 13/14/15L 0R 13/14/15R Counter/ Counter/ CLK CLK L R Address True Dual-Ported Address ADS ADS L R Register RAM Array Register CNTEN CNTEN L Decode Decode R CNTRST CNTRST L R Notes 1. See Figure 4 on page 8 for Load Conditions. 2. I/O I/O for 16 devices I/O I/O for 18 devices. 8 15 9 17 3. I/O I/O for 16 devices. I/O I/O for 18 devices. 0 7 0 8 4. A A for 16K A A for 32K A A for 64K devices. 0 13 0 14 0 15 Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-06056 Rev. *M Revised March 21, 2016CY7C09269V/79V/89V CY7C09369V/89V Contents Pin Configurations ...........................................................3 16K 18 3.3 V Synchronous Dual-Port SRAM ......... 19 Selection Guide ................................................................5 64K 18 3.3 V Synchronous Dual-Port SRAM ......... 19 Pin Definitions ..................................................................5 Ordering Code Definitions ......................................... 20 Functional Overview ........................................................6 Package Diagrams .......................................................... 21 Maximum Ratings .............................................................7 Acronyms ........................................................................22 Operating Range ...............................................................7 Document Conventions ................................................. 22 Electrical Characteristics .................................................7 Units of Measure ....................................................... 22 Capacitance ......................................................................7 Document History Page ................................................. 23 AC Test Loads and Waveforms .......................................8 Sales, Solutions, and Legal Information ...................... 25 Switching Characteristics ................................................9 Worldwide Sales and Design Support ....................... 25 Switching Waveforms ....................................................10 Products ....................................................................25 Read/Write and Enable Operation .................................18 PSoC Solutions ...................................................... 25 Address Counter Control Operation .............................18 Cypress Developer Community ................................. 25 Ordering Information ......................................................19 Technical Support ..................................................... 25 16K 16 3.3 V Synchronous Dual-Port SRAM .........19 32K 16 3.3 V Synchronous Dual-Port SRAM .........19 Document Number: 38-06056 Rev. *M Page 2 of 25