Product Information

SY88149CLKG

SY88149CLKG electronic component of Microchip

Datasheet
Limiting Amplifiers 3.3V, 1.25 Gbps LVPECL Post Amplifier with SD (I Temp, Green/4x SD gain/1xTC/10 MSOP)
Manufacturer: Microchip
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Price (USD)

100: USD 4.7193 ea
Line Total: USD 471.93

0 - Global Stock
MOQ: 100  Multiples: 1
Pack Size: 1

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Ships to you between Mon. 13 May to Wed. 15 May

MOQ : 100
Multiples : 1

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SY88149CLKG
Microchip

100 : USD 4.7193

Read More Specifications

     
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RoHS - XON
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Number of Channels
Voltage Gain dB
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Operating Supply Voltage
Operating Supply Current
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Supply Voltage - Min
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Additional Infomation About Product

SY88149CL 3.3V, 1.25Gbps PECL Limiting Post Amplifier w/High Gain TTL Signal Detect General Description Features The SY88149CL is a high-sensitivity limiting post amplifier designed for use in fiber-optic receivers. These Single 3.3V power supply devices connect to typical transimpedance amplifiers Fast SD enable/disable time (TIAs). The linear signal output from TIAs can contain 622Mbps to 1.25Gbps operation significant amounts of noise and may vary in amplitude Low-noise PECL data outputs over time. The SY88149CL quantizes these signals and outputs PECL level waveforms. High-gain SD Chatter-free Open-Collector TTL signal detect (SD) The SY88149CL operates from a single +3.3V power o o output with internal 4.75k pull-up resistor supply, over temperatures ranging from 40 C to +85 C. With its wide bandwidth and high gain, signals with data TTL EN input rates up to 1.25Gbps, and as small as 5mV , can be pp Programmable SD level set (SD ) LVL amplified to drive devices with PECL inputs. Available in a tiny 10-pin MSOP package The SY88149CL generates a high-gain signal-detect (SD) open-collector TTL output. The SD function has a Applications high gain input stage for increased sensitivity. A GE-PON/GPON/EPON programmable Signal Detect level set pin (SD ) sets LVL Gigabit Ethernet the sensitivity of the input amplitude detection. SD asserts high if the input amplitude rises above the 1062Mbps Fibre Channel threshold set by SD and de-asserts low otherwise. LVL OC-12/24 SONET/SDH The enable input (EN) de-asserts the true output signal High-gain line driver and line receiver without removing the input signal. The SD output can be Low-gain TIA interface fed back to the EN input to maintain output stability under a loss-of-signal condition. Typically, 3.4dB SD Markets hysteresis is provided to prevent chattering. FTTH/FTTP All support documentation can be found on Micrels web Datacom/Telecom site at: www.micrel.com. Optical transceiver 1 M9999-011609-C January 2009 hbwhelp micrel.com or (408) 955-1690Micrel, Inc. SY88149CL Typical Application Circuit 2 M9999-011609-C January 2009 hbwhelp micrel.com or (408) 955-1690

HS Compliance

Tariff Desc

8542.33.00 43 No -- Amplifiers

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits Digital.

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