TP2640 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description 2V Maximum Low Threshold The TP2640 is a low-threshold, Enhancement-mode (normally-off) transistor that uses an advanced vertical High Input Impedance DMOS structure and a well-proven silicon gate Low Input Capacitance manufacturing process. This combination produces a Fast Switching Speeds device with the power handling capabilities of bipolar Low On-Resistance transistors and the high input impedance and positive Free from Secondary Breakdown temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free Low Input and Output Leakage from thermal runaway and thermally induced secondary breakdown. Applications Microchips vertical DMOS FETs are ideally suited to a Logic-Level Interfaces (Ideal for TTL and CMOS) wide range of switching and amplifying applications Solid State Relays where high breakdown voltage, high input impedance, Battery-Operated Systems low input capacitance, and fast switching speeds are desired. Photovoltaic Drives Analog Switches General Purpose Line Drivers Telecommunication Switches Package Type 3-lead TO-92 8-lead SOIC (Top view) (Top view) DRAIN DRAIN DRAIN DRAIN DRAIN GATE SOURCE SOURCE N/C N/C GATE See Table 3-1 and Table 3-2 for pin information. 2020 Microchip Technology Inc. DS20006372A-page 1TP2640 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Drain-to-Source Voltage....................................................................................................................................... BV DSS Drain-to-Gate Voltage .......................................................................................................................................... BV DGS Gate-to-Source Voltage.......................................................................................................................................... 20V Operating Ambient Temperature, T .................................................................................................... 55C to +150C A Storage Temperature, T ...................................................................................................................... 55C to +150C S Notice: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS Electrical Specifications: T = 25C unless otherwise specified. All DC parameters are 100% tested at 25C unless A otherwise stated. Pulse test: 300 s pulse, 2% duty cycle. Parameter Sym. Min. Typ. Max. Unit Conditions Drain-to-Source Breakdown Voltage BV 400 V V = 0V, I = 2 mA DSS GS D Gate Threshold Voltage V 0.8 2 V V = V , I = 1 mA GS(th) GS DS D V = V , I = 1 mA GS DS D Change in V with Temperature V 5 mV/C GS(th) GS(th) (Note 1) Gate Body Leakage Current I 100 nA V = 20V, V = 0V GSS GS DS 1 A V = 0V, V = 100V GS DS V = 0V, GS 10 mA V = Maximum rating DS Zero-Gate Voltage Drain Current I DSS V = 0.8 Maximum rating, DS 1 mA V = 0V, T = 125C GS A (Note 1) On-State Drain Current I 0.7 A V = 10V, V = 25V D(ON) GS DS 12 15 V = 2.5V, I = 20 mA GS D Static Drain-to-Source On-State Resis- R 11 15 V = 4.5V, I = 150 mA DS(ON) GS D tance 11 15 V = 10V, I = 300 mA GS D V = 10V, I = 300 mA GS D Change in R with Temperature 0.75 %/C DS(ON) RDS(ON) (Note 1) Note 1: Specification is obtained by characterization and is not 100% tested. DS20006372A-page 2 2020 Microchip Technology Inc.