VP2450 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description Free from secondary breakdown The Supertex VP2450 is an enhancement-mode (normally- off) transistor that utilizes a vertical DMOS structure Low power drive requirement and Supertexs well-proven silicon-gate manufacturing Ease of paralleling process. This combination produces a device with the Low C and fast switching speeds ISS power handling capabilities of bipolar transistors, and the High input impedance and high gain high input impedance and positive temperature coefcient Excellent thermal stability inherent in MOS devices. Characteristic of all MOS Integral source-to-drain diode structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Applications Motor controls Supertexs vertical DMOS FETs are ideally suited to a Converters wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high Ampliers input impedance, low input capacitance, and fast switching Switches speeds are desired. Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Ordering Information R I Package Options DS(ON) D(ON) BV /BV DSS DGS Device (max) (min) (V) TO-92 TO-243AA (SOT-89) () (mA) VP2450 VP2450N3-G VP2450N8-G -500 30 -200 -G indicates package is RoHS compliant (Green) Pin Congurations DRAIN DRAIN SOURCE SOURCE DRAIN Absolute Maximum Ratings GATE GATE Parameter Value TO-92 (N3) TO-243AA (SOT-89) (N8) Drain-to-Source voltage BV DSS Product Marking Drain-to-Gate voltage BV DGS S i V P YY = Year Sealed Gate-to-Source voltage 20V 2 4 5 0 WW = Week Sealed O O Operating and storage temperature -55 C to +150 C Y Y W W = Green Packaging O Soldering temperature* 300 C Package may or may not include the following marks: Si or Absolute Maximum Ratings are those values beyond which damage to the device TO-92 (N3) may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. W = Code for week sealed V P 4 E W = Green Packaging * Distance of 1.6mm from case for 10 seconds. Packages may or may not include the following marks: Si or TO-243AA (SOT-89) (N8) 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.comVP2450 Thermal Characteristics I I Power Dissipation D D I I jc ja DR DRM O Package (continuous) (pulsed) T = 25 C C O O ( C/W) ( C/W) (mA) (mA) (mA) (mA) (W) TO-92 -100 -300 1.0 125 170 -100 -300 TO-243AA (SOT-89) -160 -800 1.6 15 78 -160 -800 I (continuous) is limited by max rated T. D j Mounted on FR5 board, 25mm x 25mm x 1.57mm. O Electrical Characteristics (T = 25 C unless otherwise specied) A Sym Parameter Min Typ Max Units Conditions BV Drain-to-source breakdown voltage -500 - - V V = 0V, I = -250A DSS GS D V Gate threshold voltage -1.5 - -3.5 V V = V , I = -1.0mA GS(th) GS DS D O V Change in V with temperature - - -4.8 mV/ C V = V , I = -1.0mA GS(th) GS(th) GS DS D I Gate body leakage - - -100 nA V = 20V, V = 0V GSS GS DS - - -10 A V = 0V, V = Max Rating GS DS I Zero gate voltage drain current V = 0.8 Max Rating, DSS DS - - -1.0 mA V = 0V, T = 125C GS A -75 - - V = -4.5V, V = -15V GS DS I On-state drain current mA D(ON) -200 - - V = -10V, V = -15V GS DS - - 35 V = -4.5V, I = -50mA GS D R Static drain-to-source on-state resistance DS(ON) - - 30 V = -10V, I = -100mA GS D O R Change in R with temperature - - 0.75 %/ C V = -10V, I = -100mA DS(ON) DS(ON) GS D G Forward transductance 150 320 - mmho V = -15V, I = -100mA FS DS D C Input capacitance - - 190 ISS V = 0V, GS C Common source output capacitance - - 75 pF V = -25V, OSS DS f = 1.0MHz C Reverse transfer capacitance - - 20 RSS t Turn-on delay time - - 10 d(ON) V = -25V, t Rise time - - 25 DD r ns I = -200mA, D t Turn-off delay time - - 45 d(OFF) R = 25 GEN t Fall time - - 25 f V Diode forward voltage drop - - -1.8 V V = 0V, I = -100mA SD GS SD t Reverse recovery time - 300 - ns V = 0V, I = -100mA rr GS SD Notes: O 1. All D.C. parameters 100% tested at 25 C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V PULS E 10% GENERATOR INPUT -10V R 90% GEN t t (ON) (OFF) D.U.T. t t t t d(ON) r d(OFF) F Outpu t 0V INPU T 90% 90% R L OUTPUT 10% 10% V V DD DD 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2