74AVCH20T245 20-bit dual supply translating transceiver with configurable voltage translation 3-state Rev. 6 14 January 2019 Product data sheet 1. General description The 74AVCH20T245 is a 20-bit, dual supply transceiver that enables bi-directional voltage level translation. The device can be used as two 10-bit transceivers or as a single 20-bit transceiver. It features four 10-bit input-output ports (1An, 1Bn and 2An, 2Bn), two output enable inputs (nOE), two direction inputs (nDIR) and dual supplies (V and V ). V and V can CC(A) CC(B) CC(A) CC(B) be independently supplied at any voltage between 0.8 V and 3.6 V making the device suitable for bi-directional voltage level translation between any of the low voltage nodes: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. The 1An and 2An ports, nOE and nDIR are referenced to V , the 1Bn CC(A) and 2Bn ports are referenced to V . A HIGH on a 1DIR allows transmission from 1An to 1Bn CC(B) and a LOW on 1DIR allows transmission from 1Bn to 1An. A HIGH on nOE causes the outputs to assume a HIGH impedance OFF-state. The device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either V or V are at GND level, all output ports will CC(A) CC(B) assume a high impedance OFF-state. The bus hold circuitry on the powered-up side always stays active. The 74AVCH20T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors. 2. Features and benefits Wide supply voltage range: V : 0.8 V to 3.6 V CC(A) V : 0.8 V to 3.6 V CC(B) Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114E Class 3B exceeds 8000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 VNexperia 74AVCH20T245 20-bit dual supply translating transceiver with configurable voltage translation 3-state Maximum data rates: 380 Mbit/s ( 1.8 V to 3.3 V translation) 260 Mbit/s ( 1.1 V to 3.3 V translation) 260 Mbit/s ( 1.1 V to 2.5 V translation) 210 Mbit/s ( 1.1 V to 1.8 V translation) 120 Mbit/s ( 1.1 V to 1.5 V translation) 100 Mbit/s ( 1.1 V to 1.2 V translation) Suspend mode Bus hold on data inputs Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from -40 C to +85 C and -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AVCH20T245DGG -40 C to +125 C TSSOP56 plastic thin shrink small outline package SOT364-1 56 leads body width 6.1 mm 4. Functional diagram 1DIR 2DIR 1OE 2OE 1A1 2A1 1B1 2B1 V V V V CC(A) CC(B) CC(A) CC(B) to other nine channels to other nine channels 001aal240 Fig. 1. Logic diagram 74AVCH20T245 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 6 14 January 2019 2 / 23