BUK9832-55A,115 NXP

BUK9832-55A N-channel TrenchMOS logic level FET Rev. 02 1 June 2010 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Low conduction losses due to low Suitable for logic level gate drive on-state resistance sources Q101 compliant 1.3 Applications 12 V and 24 V loads Motors, lamps and solenoids Automotive and general purpose power switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V drain-source T 25 C T 150C --55 V DS j j voltage I drain current V =5V T =25C --12 A D GS sp see Figure 1 see Figure 3 P total power T =25C see Figure 2 --8 W tot sp dissipation Static characteristics R drain-source V =4.5 V I =8A --36 m DSon GS D on-state T =25C j resistance V =10V I =8A T = 25 C - 25 29 m GS D j V =5V I =8A T =25C - 2732m GS D j see Figure 12 see Figure 13 Avalanche ruggedness E non-repetitive I =10A V 55 V --100mJ DS(AL)S D sup drain-source R =50 V =5V GS GS avalanche energy T = 25 C unclamped j(init)BUK9832-55A NXP Semiconductors N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 G gate D 4 2 D drain 3S source G 4 D drain 132 mbb076 S SOT223 (SC-73) 3. Ordering information Table 3. Ordering information Type number Package Name Description Version BUK9832-55A SC-73 plastic surface-mounted package with increased heatsink 4 SOT223 leads BUK9832-55A All information provided in this document is subject to legal disclaimers. NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 1 June 2010 2 of 13