HEF4011UBP,652 NXP

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4011UB gates Quadruple 2-input NAND gate January 1995 Product specication File under Integrated Circuits, IC04Philips Semiconductors Product specication HEF4011UB Quadruple 2-input NAND gate gates DESCRIPTION The HEF4011UB is a quadruple 2-input NAND gate. This unbuffered single stage version provides a direct implementation of the NAND function. The output impedance and output transition time depends on the input voltage and input rise and fall times applied. Fig.2 Pinning diagram. HEF4011UBP(N): 14-lead DIL plastic (SOT27-1) Fig.1 Functional diagram. HEF4011UBD(F): 14-lead DIL ceramic (cerdip) (SOT73) HEF4011UBT(D): 14-lead SO plastic (SOT108-1) ( ): Package Designator North America Fig.3 Schematic diagram (one gate). The splitting-up of the n-transistors provide identical inputs. FAMILY DATA, I LIMITS category GATES DD See Family Specifications for V /V unbuffered stages IH IL January 1995 2