HEF4013BP,652 NXP

HEF4013B Dual D-type flip-flop Rev. 9 10 December 2015 Product data sheet 1. General description The HEF4013B is a dual D-type flip-flop that features independent set-direct input (SD), clear-direct input (CD), clock input (CP) and outputs (Q, Q). Data is accepted when CP is LOW and is transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous CD and SD inputs are independent and override the D or CP inputs. The outputs are buffered for best system performance. The clock inputs Schmitt-trigger action makes the circuit highly tolerant of slower clock rise and fall times. It operates over a recommended V power supply range of 3 V to 15 V referenced to V DD SS (usually ground). Unused inputs must be connected to V , V , or another input. DD SS 2. Features and benefits Tolerant of slow clock rise and fall times Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +125 C Complies with JEDEC standard JESD 13-B 3. Applications Counters and dividers Registers Toggle flip-flops 4. Ordering information Table 1. Ordering information All types operate from 40 C to +125 C Type number Package Name Description Version HEF4013BT SO14 plastic small outline package 14 leads body width 3.9 mm SOT108-1 HEF4013BTT TSSOP14 plastic thin shrink small outline package 14 leads body width 4.4 mm SOT402-1HEF4013B Nexperia Dual D-type flip-flop 5. Functional diagram 6 4 )) 3 4 6 4 )) 3 4 Fig 1. Functional diagram & & 4 & & & & & & 4 & & 6 DD J Fig 2. Logic diagram (one flip-flop) HEF4013B All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 9 10 December 2015 2 of 16 & &3 DDJ & & 4 &3 & 4 6 & & 4 &3 & 4 6