Document Number MC9S08PA60
Freescale Semiconductor
Rev. 3, 06/2015
Data Sheet: Technical Data
MC9S08PA60
MC9S08PA60 Series Data
MC9S08PA60A and MC9S08PA32A
Sheet
are recommended for new design
Supports: MC9S08PA60(A) and
MC9S08PA32(A)
Key features Development support
Single-wire background debug interface
8-Bit S08 central processor unit (CPU)
Breakpoint capability to allow three breakpoints
Up to 20 MHz bus at 2.7 V to 5.5 V across
setting during in-circuit debugging
temperature range of -40 C to 105 C
On-chip in-circuit emulator (ICE) debug module
Supporting up to 40 interrupt/reset sources
containing two comparators and nine trigger modes
Supporting up to four-level nested interrupt
On-chip memory Peripherals
Up to 60 KB flash read/program/erase over full ACMP - one analog comparator with both positive
operating voltage and temperature and negative inputs; separately selectable interrupt
Up to 256 byte EEPROM; 2-byte erase sector; on rising and falling comparator output; filtering
program and erase while executing flash ADC - 16-channel, 12-bit resolution; 2.5 s
Up to 4096 byte random-access memory (RAM) conversion time; data buffers with optional
Flash and RAM access protection watermark; automatic compare function; internal
bandgap reference channel; operation in stop mode;
Power-saving modes
optional hardware trigger
One low-power stop mode; reduced power wait
CRC - programmable cyclic redundancy check
mode
module
Peripheral clock enable register can disable clocks to
FTM - three flex timer modulators modules
unused modules, reducing currents; allows clocks to
including one 6-channel and two 2-channel ones;
remain enabled to specific peripherals in stop3 mode
16-bit counter; each channel can be configured for
Clocks input capture, output compare, edge- or center-
Oscillator (XOSC) - loop-controlled Pierce aligned PWM mode
oscillator; crystal or ceramic resonator range of IIC - One inter-integrated circuit module; up to 400
31.25 kHz to 39.0625 kHz or 4 MHz to 20 MHz kbps; multi-master operation; programmable slave
Internal clock source (ICS) - containing a frequency- address; supporting broadcast mode and 10-bit
locked-loop (FLL) controlled by internal or external addressing; supporting SMBUS and PMBUS
reference; precision trimming of internal reference MTIM - Two modulo timers with 8-bit prescaler and
allowing 1% deviation across temperature range of 0 overflow interrupt
C to 70 C and 2% deviation across temperature RTC - 16-bit real timer counter (RTC)
range of -40 C to 105 C; up to 20 MHz SCI - three serial communication interface (SCI/
UART) modules optional 13-bit break; full duplex
System protection
non-return to zero (NRZ); LIN extension support
Watchdog with independent clock source
SPI - one 8-bit and one 16-bit serial peripheral
Low-voltage detection with reset or interrupt;
interface (SPI) modules; full-duplex or single-wire
selectable trip points
bidirectional; master or slave mode
Illegal opcode detection with reset
Illegal address detection with reset
20112015 Freescale Semiconductor, Inc. Input/Output
Up to 57 GPIOs including one output-only pin
Two 8-bit keyboard interrupt modules (KBI)
Two true open-drain output pins
Eight, ultra-high current sink pins supporting 20 mA source/sink current
Package options
64-pin LQFP; 64-pin QFP
48-pin LQFP
44-pin LQFP
32-pin LQFP
MC9S08PA60 Series Data Sheet, Rev. 3, 06/2015
2 Freescale Semiconductor, Inc.