PHU97NQ03LT,127 NXP

PHU97NQ03LT N-channel TrenchMOS logic level FET Rev. 02 21 December 2010 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.2 Features and benefits Suitable for high frequency Suitable for logic level gate drive applications due to fast switching sources characteristics 1.3 Applications Computer motherboards 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage 25 C T 175 C - - 25 V DS j I drain current T =25C; V =10V; --75 A D mb GS see Figure 1; see Figure 3 P total power dissipation T = 25 C; see Figure 2 --107W tot mb Static characteristics R drain-source on-state V =10V; I =25A; -5.6 6.6 m DSon GS D resistance T = 25 C; see Figure 9; j see Figure 10 Dynamic characteristics Q gate-drain charge V = 4.5 V; I =25A; -1.9 -nC GD GS D V = 12 V; see Figure 11; DS see Figure 12 IPAKPHU97NQ03LT NXP Semiconductors N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 G gate mb D 2 D drain 3S source G mb D mounting base; connected to drain mbb076 S 1 2 3 SOT533 (IPAK) 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PHU97NQ03LT IPAK plastic single-ended package (IPAK); 3 leads (in-line) SOT533 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage 25 C T 175 C - 25 V DS j V drain-gate voltage 25 C T 175 C; R =20k -25 V DGR j GS V gate-source voltage -20 20 V GS I drain current V =10V; T = 100 C; see Figure 1 -69 A D GS mb V =10V; T =25C; see Figure 1; -75 A GS mb see Figure 3 I peak drain current pulsed; t 10 s; T =25C; - 300 A DM p mb see Figure 3 P total power dissipation T = 25 C; see Figure 2 - 107 W tot mb T storage temperature -55 175 C stg T junction temperature -55 175 C j Source-drain diode I source current T =25C - 75 A S mb I peak source current pulsed; t 10 s; T = 25 C - 240 A SM p mb Avalanche ruggedness E non-repetitive drain-source V =10V; T =25C; I =35A; -60 mJ DS(AL)S GS j(init) D avalanche energy V 25 V; unclamped; t =0.1 ms; sup p R =50 GS PHU97NQ03LT All information provided in this document is subject to legal disclaimers. NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 21 December 2010 2 of 13